· 7 years ago · Feb 13, 2019, 02:08 PM
1
2
3#include "stdafx.h"
4#include <winsock2.h>
5
6#pragma comment(lib, "wsock32.lib")
7
8
9#define STUDENT_NUMBER "17026846"
10
11#define IP_ADDRESS_SERVER "127.0.0.1"
12
13#define PORT_SERVER 0x1984 // We define a port that we are going to use.
14#define PORT_CLIENT 0x1985 // We define a port that we are going to use.
15
16#define WORD unsigned short
17#define DWORD unsigned long
18#define BYTE unsigned char
19
20#define MAX_FILENAME_SIZE 500
21#define MAX_BUFFER_SIZE 500
22
23SOCKADDR_IN server_addr;
24SOCKADDR_IN client_addr;
25
26SOCKET sock; // This is our socket, it is the handle to the IO address to read/write packets
27
28WSADATA data;
29
30char InputBuffer [MAX_BUFFER_SIZE];
31
32char hex_file [MAX_BUFFER_SIZE];
33char trc_file [MAX_BUFFER_SIZE];
34
35//////////////////////////
36// Registers //
37//////////////////////////
38
39#define FLAG_Z 0x80
40#define FLAG_I 0x20
41#define FLAG_N 0x08
42#define FLAG_C 0x01
43#define REGISTER_M 5
44#define REGISTER_A 4
45#define REGISTER_H 3
46#define REGISTER_L 2
47#define REGISTER_C 1
48#define REGISTER_B 0
49#define REGISTER_X 0
50#define REGISTER_Y 1
51BYTE Index_Registers[2];
52
53BYTE Registers[6];
54BYTE Flags;
55WORD ProgramCounter;
56WORD StackPointer;
57
58
59////////////
60// Memory //
61////////////
62
63#define MEMORY_SIZE 65536
64
65BYTE Memory[MEMORY_SIZE];
66
67#define TEST_ADDRESS_1 0x01FA
68#define TEST_ADDRESS_2 0x01FB
69#define TEST_ADDRESS_3 0x01FC
70#define TEST_ADDRESS_4 0x01FD
71#define TEST_ADDRESS_5 0x01FE
72#define TEST_ADDRESS_6 0x01FF
73#define TEST_ADDRESS_7 0x0200
74#define TEST_ADDRESS_8 0x0201
75#define TEST_ADDRESS_9 0x0202
76#define TEST_ADDRESS_10 0x0203
77#define TEST_ADDRESS_11 0x0204
78#define TEST_ADDRESS_12 0x0205
79
80
81///////////////////////
82// Control variables //
83///////////////////////
84
85bool memory_in_range = true;
86bool halt = false;
87
88
89///////////////////////
90// Disassembly table //
91///////////////////////
92
93char opcode_mneumonics[][14] =
94{
95"ILLEGAL ",
96"ILLEGAL ",
97"SWI impl ",
98"RTI impl ",
99"STO abs ",
100"STOX abs ",
101"STOY abs ",
102"JMPR abs ",
103"CCC abs ",
104"CCS abs ",
105"CNE abs ",
106"CEQ abs ",
107"CMI abs ",
108"CPL abs ",
109"ILLEGAL ",
110"STOS abs ",
111
112"ILLEGAL ",
113"ILLEGAL ",
114"ILLEGAL ",
115"ILLEGAL ",
116"STO abs,X ",
117"STOX abs,X ",
118"STOY abs,X ",
119"NOP impl ",
120"WAI impl ",
121"ILLEGAL ",
122"ILLEGAL ",
123"ILLEGAL ",
124"ADI # ",
125"CPI # ",
126"ANI # ",
127"STOS abs,X ",
128
129"LODS # ",
130"LDX # ",
131"LODY # ",
132"RT impl ",
133"STO abs,Y ",
134"STOX abs,Y ",
135"STOY abs,Y ",
136"MVR #,B ",
137"MVR #,C ",
138"MVR #,L ",
139"MVR #,H ",
140"TAY impl ",
141"TYA impl ",
142"MSA impl ",
143"ILLEGAL ",
144"STOS abs,Y ",
145
146"LODS abs ",
147"LDX abs ",
148"LODY abs ",
149"ILLEGAL ",
150"STO abs,XY ",
151"STOX abs,XY ",
152"STOY abs,XY ",
153"ILLEGAL ",
154"JUMP abs ",
155"JCC abs ",
156"JCS abs ",
157"JNE abs ",
158"JEQ abs ",
159"JMI abs ",
160"JPL abs ",
161"STOS abs,XY ",
162
163"LODS abs,X ",
164"LDX abs,X ",
165"LODY abs,X ",
166"LD # ",
167"STO zpg ",
168"STOX zpg ",
169"STOY zpg ",
170"ILLEGAL ",
171"ILLEGAL ",
172"ILLEGAL ",
173"DEX impl ",
174"INX impl ",
175"DEY impl ",
176"INY impl ",
177"ILLEGAL ",
178"STOS zpg ",
179
180"LODS abs,Y ",
181"LDX abs,Y ",
182"LODY abs,Y ",
183"LD abs ",
184"TEST abs ",
185"INC abs ",
186"DEC abs ",
187"RR abs ",
188"RCL abs ",
189"SAL abs ",
190"SHR abs ",
191"COM abs ",
192"NEG abs ",
193"RAL abs ",
194"ROR abs ",
195"CLR abs ",
196
197"LODS abs,XY ",
198"LDX abs,XY ",
199"LODY abs,XY ",
200"LD abs,X ",
201"TEST abs,X ",
202"INC abs,X ",
203"DEC abs,X ",
204"RR abs,X ",
205"RCL abs,X ",
206"SAL abs,X ",
207"SHR abs,X ",
208"COM abs,X ",
209"NEG abs,X ",
210"RAL abs,X ",
211"ROR abs,X ",
212"CLR abs,X ",
213
214"LODS zpg ",
215"LDX zpg ",
216"LODY zpg ",
217"LD abs,Y ",
218"TEST abs,Y ",
219"INC abs,Y ",
220"DEC abs,Y ",
221"RR abs,Y ",
222"RCL abs,Y ",
223"SAL abs,Y ",
224"SHR abs,Y ",
225"COM abs,Y ",
226"NEG abs,Y ",
227"RAL abs,Y ",
228"ROR abs,Y ",
229"CLR abs,Y ",
230
231"ILLEGAL ",
232"ILLEGAL ",
233"ILLEGAL ",
234"LD abs,XY ",
235"TEST abs,XY ",
236"INC abs,XY ",
237"DEC abs,XY ",
238"RR abs,XY ",
239"RCL abs,XY ",
240"SAL abs,XY ",
241"SHR abs,XY ",
242"COM abs,XY ",
243"NEG abs,XY ",
244"RAL abs,XY ",
245"ROR abs,XY ",
246"CLR abs,XY ",
247
248"ILLEGAL ",
249"ILLEGAL ",
250"ILLEGAL ",
251"LD zpg ",
252"TESTA A,A ",
253"INCA A,A ",
254"DECA A,A ",
255"RRA A,A ",
256"RCLA A,A ",
257"SALA A,A ",
258"SHRA A,A ",
259"COMA A,A ",
260"NEGA A,0 ",
261"RALA A,A ",
262"RORA A,A ",
263"CLRA A,0 ",
264
265"MV A,A ",
266"MV B,A ",
267"MV C,A ",
268"MV L,A ",
269"MV H,A ",
270"MV M,A ",
271"CLC impl ",
272"SEC impl ",
273"CLI impl ",
274"SEI impl ",
275"CMC impl ",
276"ILLEGAL ",
277"ILLEGAL ",
278"ILLEGAL ",
279"PUSH ,A ",
280"POP A, ",
281
282"MV A,B ",
283"MV B,B ",
284"MV C,B ",
285"MV L,B ",
286"MV H,B ",
287"MV M,B ",
288"ADC A,B ",
289"SBC A,B ",
290"ADD A,B ",
291"SUB A,B ",
292"CMP A,B ",
293"OR A,B ",
294"AND A,B ",
295"XOR A,B ",
296"PUSH ,s ",
297"POP s, ",
298
299"MV A,C ",
300"MV B,C ",
301"MV C,C ",
302"MV L,C ",
303"MV H,C ",
304"MV M,C ",
305"ADC A,C ",
306"SBC A,C ",
307"ADD A,C ",
308"SUB A,C ",
309"CMP A,C ",
310"OR A,C ",
311"AND A,C ",
312"XOR A,C ",
313"PUSH ,B ",
314"POP B, ",
315
316"MV A,L ",
317"MV B,L ",
318"MV C,L ",
319"MV L,L ",
320"MV H,L ",
321"MV M,L ",
322"ADC A,L ",
323"SBC A,L ",
324"ADD A,L ",
325"SUB A,L ",
326"CMP A,L ",
327"OR A,L ",
328"AND A,L ",
329"XOR A,L ",
330"PUSH ,C ",
331"POP C, ",
332
333"MV A,H ",
334"MV B,H ",
335"MV C,H ",
336"MV L,H ",
337"MV H,H ",
338"MV M,H ",
339"ADC A,H ",
340"SBC A,H ",
341"ADD A,H ",
342"SUB A,H ",
343"CMP A,H ",
344"OR A,H ",
345"AND A,H ",
346"XOR A,H ",
347"PUSH ,L ",
348"POP L, ",
349
350"MV A,M ",
351"MV B,M ",
352"MV C,M ",
353"MV L,M ",
354"MV H,M ",
355"MV -,- ",
356"ADC A,M ",
357"SBC A,M ",
358"ADD A,M ",
359"SUB A,M ",
360"CMP A,M ",
361"OR A,M ",
362"AND A,M ",
363"XOR A,M ",
364"PUSH ,H ",
365"POP H, ",
366
367};
368
369////////////////////////////////////////////////////////////////////////////////
370// Simulator/Emulator (Start) //
371////////////////////////////////////////////////////////////////////////////////
372BYTE fetch()
373{
374 BYTE byte = 0;
375
376 if ((ProgramCounter >= 0) && (ProgramCounter <= MEMORY_SIZE))
377 {
378 memory_in_range = true;
379 byte = Memory[ProgramCounter];
380 ProgramCounter++;
381 }
382 else
383 {
384 memory_in_range = false;
385 }
386 return byte;
387}
388void set_flag_n(BYTE inReg) {
389 BYTE reg;
390 reg = inReg;
391
392 if ((reg & 0x80) != 0) // msbit set
393 {
394 Flags = Flags | FLAG_N;
395 }
396 else
397 {
398 Flags = Flags & (0xFF - FLAG_N);
399 }
400}
401
402void set_flag_z(BYTE inReg) {
403
404 BYTE reg;
405 reg = inReg;
406
407 if (reg == 0) // msbit set
408 {
409 Flags = Flags | FLAG_Z;
410 }
411 else
412 {
413 Flags = Flags & (0xFF - FLAG_Z);
414 }
415}
416
417
418void Group_1(BYTE opcode){
419 BYTE LB = 0;
420 BYTE HB = 0;
421 WORD address = 0;
422 WORD data = 0;
423 WORD temp_word = 0;
424
425
426 switch(opcode) {
427 case 0x43: //LD Immediate
428 data = fetch();
429 Registers[REGISTER_A] = data;
430
431 set_flag_n((BYTE)temp_word);
432 set_flag_z((BYTE)temp_word);
433 break;
434 case 0x53: //LD Absoulute
435 LB = fetch();
436 HB = fetch();
437 address += (WORD)((WORD)HB << 8) + LB;
438 if (address >=0 && address <MEMORY_SIZE)
439 {
440 Registers[REGISTER_A] = Memory[address];
441 }
442 set_flag_n((BYTE)temp_word);
443 set_flag_z((BYTE)temp_word);
444 break;
445 case 0x63://LD Absoulte X
446 address += Index_Registers[REGISTER_X];
447 LB = fetch();
448 HB = fetch();
449 address += (WORD)((WORD)HB << 8) + LB;
450 if (address >= 0 && address < MEMORY_SIZE)
451 {
452 Registers[REGISTER_A] = Memory[address];
453 }
454 set_flag_n((BYTE)temp_word);
455 set_flag_z((BYTE)temp_word);
456 break;
457 case 0x73://LD Absoulte Y
458 address += Index_Registers[REGISTER_Y];
459 LB = fetch();
460 HB = fetch();
461 address += (WORD)((WORD)HB << 8) + LB;
462 if (address >= 0 && address < MEMORY_SIZE)
463 {
464 Registers[REGISTER_A] = Memory[address];
465 }
466 set_flag_n((BYTE)temp_word);
467 set_flag_z((BYTE)temp_word);
468 break;
469 case 0x83://LD Absoulte XY
470 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X]; ;
471 LB = fetch();
472 HB = fetch();
473 address += (WORD)((WORD)HB << 8) + LB;
474 if (address >= 0 && address < MEMORY_SIZE)
475 {
476 Registers[REGISTER_A] = Memory[address];
477 }
478 set_flag_n((BYTE)temp_word);
479 set_flag_z((BYTE)temp_word);
480 break;
481 case 0x93://LD zpg
482 address += 0x0000 | (WORD)fetch();
483 if (address >= 0 && address < MEMORY_SIZE)
484 {
485 Registers[REGISTER_A] = Memory[address];
486 }
487 set_flag_n((BYTE)temp_word);
488 set_flag_z((BYTE)temp_word);
489 break;
490 case 0x04://STO Absolute
491 LB = fetch();
492 HB = fetch();
493 address += (WORD)((WORD)HB << 8) + LB;
494 if (address >= 0 && address < MEMORY_SIZE)
495 {
496 Memory[address]=Registers[REGISTER_A];
497 }
498 set_flag_n((BYTE)temp_word);
499 set_flag_z((BYTE)temp_word);
500 break;
501 case 0x14://STO Absolute X
502 address += Index_Registers[REGISTER_X];
503 LB = fetch();
504 HB = fetch();
505 address += (WORD)((WORD)HB << 8) + LB;
506 if (address >= 0 && address < MEMORY_SIZE)
507 {
508 Memory[address]=Registers[REGISTER_A];
509 }
510 set_flag_n((BYTE)temp_word);
511 set_flag_z((BYTE)temp_word);
512 break;
513 case 0x24: //STO Absolute Y
514 address += Index_Registers[REGISTER_Y];
515 LB = fetch();
516 HB = fetch();
517 address += (WORD)((WORD)HB << 8) + LB;
518 if (address >= 0 && address < MEMORY_SIZE)
519 {
520 Memory[address]= Registers[REGISTER_A];
521 }
522 set_flag_n((BYTE)temp_word);
523 set_flag_z((BYTE)temp_word);
524 break;
525 case 0x34://STO Absolute XY
526 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
527 LB = fetch();
528 HB = fetch();
529 address += (WORD)((WORD)HB << 8) + LB;
530 if (address >= 0 && address < MEMORY_SIZE)
531 {
532 Memory[address]=Registers[REGISTER_A];
533 }
534 set_flag_n((BYTE)temp_word);
535 set_flag_z((BYTE)temp_word);
536 break;
537 case 0x44://STO zpg
538 address += 0x0000 | (WORD)fetch();
539 if (address >= 0 && address < MEMORY_SIZE)
540 {
541 Memory[address] = Registers[REGISTER_A];
542 }
543 set_flag_n((BYTE)temp_word);
544 set_flag_z((BYTE)temp_word);
545 break;
546 case 0x27://Register B MVR Intermediate
547 data = fetch();
548 Registers[REGISTER_B] = data;
549
550 set_flag_n((BYTE)temp_word);
551 set_flag_z((BYTE)temp_word);
552 break;
553 case 0x28://Register C MVR Intermediate
554 data = fetch();
555 Registers[REGISTER_C] = data;
556
557 set_flag_n((BYTE)temp_word);
558 set_flag_z((BYTE)temp_word);
559 break;
560 case 0x29://Register L MVR Intermediate
561 data = fetch();
562 Registers[REGISTER_L] = data;
563
564 set_flag_n((BYTE)temp_word);
565 set_flag_z((BYTE)temp_word);
566 break;
567 case 0x2A://Register H MVR Intermediate
568 data = fetch();
569 Registers[REGISTER_H] = data;
570
571 set_flag_n((BYTE)temp_word);
572 set_flag_z((BYTE)temp_word);
573 break;
574 case 0x20://LODS Immediate
575 data = fetch();
576 StackPointer = data; StackPointer += (WORD)fetch()<< 8;
577
578 set_flag_n((BYTE)temp_word);
579 set_flag_z((BYTE)temp_word);
580 break;
581 case 0x30://LODS Absoulte
582 LB = fetch();
583 HB = fetch();
584 address += (WORD)((WORD)HB << 8) + LB;
585 if (address >= 0 && address < MEMORY_SIZE - 1) {
586 StackPointer = Memory[address];
587 StackPointer += (WORD)Memory[address + 1]<< 8;
588 }
589
590 set_flag_n((BYTE)temp_word);
591 set_flag_z((BYTE)temp_word);
592 break;
593 case 0x40://LODS Absoulte X
594 address += Index_Registers[REGISTER_X];
595 LB = fetch();
596 HB = fetch();
597 address += (WORD)((WORD)HB << 8) + LB;
598 if (address >= 0 && address < MEMORY_SIZE - 1) {
599 StackPointer = Memory[address];
600 StackPointer += (WORD)Memory[address + 1]<< 8;
601 }
602
603 set_flag_n((BYTE)temp_word);
604 set_flag_z((BYTE)temp_word);
605 break;
606 case 0x50://LODS Absoulte Y
607 address += Index_Registers[REGISTER_Y];
608 LB = fetch();
609 HB = fetch();
610 address += (WORD)((WORD)HB<< 8) + LB;
611 if (address >= 0 && address < MEMORY_SIZE - 1) {
612 StackPointer = Memory[address];
613 StackPointer += (WORD)Memory[address + 1]<< 8;
614 }
615
616 set_flag_n((BYTE)temp_word);
617 set_flag_z((BYTE)temp_word);
618 break;
619 case 0x60://LODS Absolute XY
620 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
621 LB = fetch();
622 HB = fetch();
623 address += (WORD)((WORD)HB << 8) + LB;
624 if (address >= 0 && address < MEMORY_SIZE - 1) {
625 StackPointer = Memory[address];
626 StackPointer += (WORD)Memory[address + 1] << 8;
627 }
628
629 set_flag_n((BYTE)temp_word);
630 set_flag_z((BYTE)temp_word);
631 break;
632 case 0x70://LODS zpg
633 address += 0x0000 | (WORD)fetch();
634 if (address >= 0 && address < MEMORY_SIZE - 1) {
635 StackPointer = Memory[address];
636 StackPointer += (WORD)Memory[address + 1] << 8;
637 }
638 set_flag_n((BYTE)temp_word);
639 set_flag_z((BYTE)temp_word);
640 break;
641 case 0xB6://ADC A,B
642 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_B];
643 if ((Flags & FLAG_C) != 0)
644 {
645 temp_word++;
646 }
647 if (temp_word >= 0x100)
648 {
649 Flags = Flags | FLAG_C;
650 }
651 else
652 {
653 Flags = Flags & (0xFF - FLAG_C);
654 }
655 set_flag_n((BYTE)temp_word);
656 set_flag_z((BYTE)temp_word);
657 Registers[REGISTER_A] = (BYTE)temp_word;
658 break;
659 case 0xC6://ADC A,C
660 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_C];
661 if ((Flags & FLAG_C) != 0)
662 {
663 temp_word++;
664 }
665 if (temp_word >= 0x100)
666 {
667 Flags = Flags | FLAG_C;
668 }
669 else
670 {
671 Flags = Flags & (0xFF - FLAG_C);
672 }
673 set_flag_n((BYTE)temp_word);
674 set_flag_z((BYTE)temp_word);
675 Registers[REGISTER_A] = (BYTE)temp_word;
676 break;
677 case 0xD6://ADC A,L
678 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_L];
679 if ((Flags & FLAG_C) != 0)
680 {
681 temp_word++;
682 }
683 if (temp_word >= 0x100)
684 {
685 Flags = Flags | FLAG_C;
686 }
687 else
688 {
689 Flags = Flags & (0xFF - FLAG_C);
690 }
691 set_flag_n((BYTE)temp_word);
692 set_flag_z((BYTE)temp_word);
693 Registers[REGISTER_A] = (BYTE)temp_word;
694 break;
695 case 0xE6://ADC A,H
696 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_H];
697 if ((Flags & FLAG_C) != 0)
698 {
699 temp_word++;
700 }
701 if (temp_word >= 0x100)
702 {
703 Flags = Flags | FLAG_C;
704 }
705 else
706 {
707 Flags = Flags & (0xFF - FLAG_C);
708 }
709 set_flag_n((BYTE)temp_word);
710 set_flag_z((BYTE)temp_word);
711 Registers[REGISTER_A] = (BYTE)temp_word;
712 break;
713 case 0xF6://ADC A,M
714 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_M];
715 if ((Flags & FLAG_C) != 0)
716 {
717 temp_word++;
718 }
719 if (temp_word >= 0x100)
720 {
721 Flags = Flags | FLAG_C;
722 }
723 else
724 {
725 Flags = Flags & (0xFF - FLAG_C);
726 }
727 set_flag_n((BYTE)temp_word);
728 set_flag_z((BYTE)temp_word);
729 Registers[REGISTER_A] = (BYTE)temp_word;
730 break;
731 case 0xBA://CMP A,B
732 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_B];
733 if (temp_word >= 0x100) {
734 Flags = Flags | FLAG_C; // Set carry flag
735 }
736 else {
737 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
738 }
739 set_flag_n((BYTE)temp_word);
740 set_flag_z((BYTE)temp_word);
741 break;
742 case 0xCA://CMP A,C
743 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_C];
744 if (temp_word >= 0x100) {
745 Flags = Flags | FLAG_C; // Set carry flag
746 }
747 else {
748 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
749 }
750 set_flag_n((BYTE)temp_word);
751 set_flag_z((BYTE)temp_word);
752 break;
753 case 0xDA://CMP A,L
754 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_L];
755 if (temp_word >= 0x100) {
756 Flags = Flags | FLAG_C; // Set carry flag
757 }
758 else {
759 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
760 }
761 set_flag_n((BYTE)temp_word);
762 set_flag_z((BYTE)temp_word);
763 break;
764 case 0xEA://CMP A,H
765 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_H];
766 if (temp_word >= 0x100) {
767 Flags = Flags | FLAG_C; // Set carry flag
768 }
769 else {
770 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
771 }
772 set_flag_n((BYTE)temp_word);
773 set_flag_z((BYTE)temp_word);
774 break;
775 case 0xFA://CMP A,M
776 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_M];
777 if (temp_word >= 0x100) {
778 Flags = Flags | FLAG_C; // Set carry flag
779 }
780 else {
781 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
782 }
783 set_flag_n((BYTE)temp_word);
784 set_flag_z((BYTE)temp_word);
785 break;
786 case 0x2D://MSA
787 Registers[REGISTER_A] = Flags;
788 break;
789 case 0x21://LDX Immediate
790 data = fetch();
791 Index_Registers[REGISTER_X] = data;
792
793 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
794 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
795 break;
796 case 0x31: //LDX Absoulute
797 LB = fetch();
798 HB = fetch();
799 address += (WORD)((WORD)HB << 8) + LB;
800 if (address >= 0 && address < MEMORY_SIZE)
801 {
802 Index_Registers[REGISTER_X] = Memory[address];
803 }
804 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
805 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
806 break;
807 case 0x41://LDX Absoulte X
808 address += Index_Registers[REGISTER_X];
809 LB = fetch();
810 HB = fetch();
811 address += (WORD)((WORD)HB << 8) + LB;
812 if (address >= 0 && address < MEMORY_SIZE)
813 {
814 Index_Registers[REGISTER_X] = Memory[address];
815 }
816 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
817 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
818 break;
819 case 0x51://LDX Absoulte Y
820 address += Index_Registers[REGISTER_Y];
821 LB = fetch();
822 HB = fetch();
823 address += (WORD)((WORD)HB << 8) + LB;
824 if (address >= 0 && address < MEMORY_SIZE)
825 {
826 Index_Registers[REGISTER_X] = Memory[address];
827 }
828 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
829 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
830 break;
831 case 0x61://LDX Absoulte XY
832 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
833 LB = fetch();
834 HB = fetch();
835 address += (WORD)((WORD)HB << 8) + LB;
836 if (address >= 0 && address < MEMORY_SIZE)
837 {
838 Index_Registers[REGISTER_X] = Memory[address];
839 }
840 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
841 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
842 break;
843 case 0x71://LDX zpg
844 address += 0x0000 | (WORD)fetch();
845 if (address >= 0 && address < MEMORY_SIZE)
846 {
847 Index_Registers[REGISTER_X] = Memory[address];
848 }
849 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
850 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
851 break;
852 case 0x05://STOX Absolute
853 LB = fetch();
854 HB = fetch();
855 address += (WORD)((WORD)HB << 8) + LB;
856 if (address >= 0 && address < MEMORY_SIZE)
857 {
858 Memory[address] = Index_Registers[REGISTER_X];
859 }
860
861 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
862 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
863 break;
864 case 0x15://STOX Absolute X
865 address += Index_Registers[REGISTER_X];
866 LB = fetch();
867 HB = fetch();
868 address += (WORD)((WORD)HB << 8) + LB;
869 if (address >= 0 && address < MEMORY_SIZE)
870 {
871 Memory[address] = Index_Registers[REGISTER_X];
872 }
873
874 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
875 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
876 break;
877 case 0x25: //STOX Absolute Y
878 address += Index_Registers[REGISTER_Y];
879 LB = fetch();
880 HB = fetch();
881 address += (WORD)((WORD)HB << 8) + LB;
882 if (address >= 0 && address < MEMORY_SIZE)
883 {
884 Memory[address] = Index_Registers[REGISTER_X];
885 }
886
887 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
888 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
889 break;
890 case 0x35://STOX Absolute XY
891 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
892 LB = fetch();
893 HB = fetch();
894 address += (WORD)((WORD)HB << 8) + LB;
895 if (address >= 0 && address < MEMORY_SIZE)
896 {
897 Memory[address] = Index_Registers[REGISTER_X];
898 }
899
900 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
901 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
902 break;
903 case 0x45://STOX zpg
904 address += 0x0000 | (WORD)fetch();
905 if (address >= 0 && address < MEMORY_SIZE)
906 {
907 Memory[address] = Index_Registers[REGISTER_X];
908 }
909
910 set_flag_n((BYTE)Index_Registers[REGISTER_X]);
911 set_flag_z((BYTE)Index_Registers[REGISTER_X]);
912 break;
913 case 0x22://LODY Immediate
914 data = fetch();
915 Index_Registers[REGISTER_Y] = data;
916
917 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
918 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
919 break;
920 case 0x32: //LODY Absoulute
921 LB = fetch();
922 HB = fetch();
923 address += (WORD)((WORD)HB << 8) + LB;
924 if (address >= 0 && address < MEMORY_SIZE)
925 {
926 Index_Registers[REGISTER_Y] = Memory[address];
927 }
928
929 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
930 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
931 break;
932 case 0x42://LODY Absoulte X
933 address += Index_Registers[REGISTER_X];
934 LB = fetch();
935 HB = fetch();
936 address += (WORD)((WORD)HB << 8) + LB;
937 if (address >= 0 && address < MEMORY_SIZE)
938 {
939 Index_Registers[REGISTER_Y] = Memory[address];
940 }
941
942 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
943 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
944 break;
945 case 0x52://LODY Absoulte Y
946 address += Index_Registers[REGISTER_Y];
947 LB = fetch();
948 HB = fetch();
949 address += (WORD)((WORD)HB << 8) + LB;
950 if (address >= 0 && address < MEMORY_SIZE)
951 {
952 Index_Registers[REGISTER_Y] = Memory[address];
953 }
954
955 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
956 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
957 break;
958 case 0x62://LODY Absoulte XY
959 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
960 LB = fetch();
961 HB = fetch();
962 address += (WORD)((WORD)HB << 8) + LB;
963 if (address >= 0 && address < MEMORY_SIZE)
964 {
965 Index_Registers[REGISTER_Y] = Memory[address];
966 }
967
968 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
969 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
970 break;
971 case 0x72://LODY zpg
972 address += 0x0000 | (WORD)fetch();
973 if (address >= 0 && address < MEMORY_SIZE)
974 {
975 Index_Registers[REGISTER_Y] = Memory[address];
976 }
977 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
978 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
979 break;
980 case 0x06://STOY Absolute
981 LB = fetch();
982 HB = fetch();
983 address += (WORD)((WORD)HB << 8) + LB;
984 if (address >= 0 && address < MEMORY_SIZE)
985 {
986 Memory[address] = Index_Registers[REGISTER_Y];
987 }
988
989 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
990 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
991 break;
992 case 0x16://STOY Absolute X
993 address += Index_Registers[REGISTER_X];
994 LB = fetch();
995 HB = fetch();
996 address += (WORD)((WORD)HB << 8) + LB;
997 if (address >= 0 && address < MEMORY_SIZE)
998 {
999 Memory[address] = Index_Registers[REGISTER_Y];
1000 }
1001
1002 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
1003 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
1004 break;
1005 case 0x26: //STOY Absolute Y
1006 address += Index_Registers[REGISTER_Y];
1007 LB = fetch();
1008 HB = fetch();
1009 address += (WORD)((WORD)HB << 8) + LB;
1010 if (address >= 0 && address < MEMORY_SIZE)
1011 {
1012 Memory[address] = Index_Registers[REGISTER_Y];
1013 }
1014
1015 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
1016 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
1017 break;
1018 case 0x36://STOY Absolute XY
1019 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1020 LB = fetch();
1021 HB = fetch();
1022 address += (WORD)((WORD)HB << 8) + LB;
1023 if (address >= 0 && address < MEMORY_SIZE)
1024 {
1025 Memory[address] = Index_Registers[REGISTER_Y];
1026 }
1027
1028 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
1029 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
1030 break;
1031 case 0x46://STOY zpg
1032 address += 0x0000 | (WORD)fetch();
1033 if (address >= 0 && address < MEMORY_SIZE)
1034 {
1035 Memory[address] = Index_Registers[REGISTER_Y];
1036 }
1037
1038 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
1039 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
1040 break;
1041 case 0x2B://TAY
1042 Index_Registers[REGISTER_Y] = Registers[REGISTER_A];
1043
1044 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
1045 break;
1046 case 0x2C://TYA
1047 Registers[REGISTER_A] = Index_Registers[REGISTER_Y];
1048
1049 set_flag_n((BYTE)Index_Registers[REGISTER_Y]);
1050 set_flag_z((BYTE)Index_Registers[REGISTER_Y]);
1051 break;
1052 case 0x0F://STOS Absoulte
1053 LB = fetch();
1054 HB = fetch();
1055 address += (WORD)((WORD)HB << 8) + LB;
1056 if (address >= 0 && address < MEMORY_SIZE - 1) {
1057 HB = (BYTE)(StackPointer >> 8);
1058 LB = (BYTE)StackPointer;
1059 Memory[address] = LB;
1060 Memory[address + 1] = HB;
1061
1062 }
1063
1064 set_flag_n((BYTE)temp_word);
1065 set_flag_z((BYTE)temp_word);
1066 break;
1067 case 0x1F://STOS Absoulte X
1068 address += Index_Registers[REGISTER_X];
1069 LB = fetch();
1070 HB = fetch();
1071 address += (WORD)((WORD)HB << 8) + LB;
1072 if (address >= 0 && address < MEMORY_SIZE - 1) {
1073 HB = (BYTE)(StackPointer >> 8);
1074 LB = (BYTE)StackPointer;
1075 Memory[address] = LB;
1076 Memory[address + 1] = HB;
1077
1078 }
1079
1080 set_flag_n((BYTE)temp_word);
1081 set_flag_z((BYTE)temp_word);
1082 break;
1083 case 0x2F://STOS Absoulte Y
1084 address += Index_Registers[REGISTER_Y];
1085 LB = fetch();
1086 HB = fetch();
1087 address += (WORD)((WORD)HB << 8) + LB;
1088 if (address >= 0 && address < MEMORY_SIZE - 1) {
1089 HB = (BYTE)(StackPointer >> 8);
1090 LB = (BYTE)StackPointer;
1091 Memory[address] = LB;
1092 Memory[address + 1] = HB;
1093
1094 }
1095
1096 set_flag_n((BYTE)temp_word);
1097 set_flag_z((BYTE)temp_word);
1098 break;
1099 case 0x3F://STOS Absolute XY
1100 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1101 LB = fetch();
1102 HB = fetch();
1103 address += (WORD)((WORD)HB << 8) + LB;
1104 if (address >= 0 && address < MEMORY_SIZE - 1) {
1105 HB = (BYTE)(StackPointer >> 8);
1106 LB = (BYTE)StackPointer;
1107 Memory[address] = LB;
1108 Memory[address + 1] = HB;
1109
1110 }
1111
1112 set_flag_n((BYTE)temp_word);
1113 set_flag_z((BYTE)temp_word);
1114 break;
1115 case 0x4F://STOS zpg
1116 address += 0x0000 | (WORD)fetch();
1117 if (address >= 0 && address < MEMORY_SIZE - 1) {
1118 HB = (BYTE)(StackPointer >> 8);
1119 LB = (BYTE)StackPointer;
1120 Memory[address] = LB;
1121 Memory[address + 1] = HB;
1122 }
1123
1124 set_flag_n((BYTE)temp_word);
1125 set_flag_z((BYTE)temp_word);
1126 break;
1127 case 0xB8://ADD A,B
1128 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_B];
1129 if (temp_word >= 0x100)
1130 {
1131 Flags = Flags | FLAG_C;
1132 }
1133 else
1134 {
1135 Flags = Flags & (0xFF - FLAG_C);
1136 }
1137 set_flag_n((BYTE)temp_word);
1138 set_flag_z((BYTE)temp_word);
1139 Registers[REGISTER_A] = (BYTE)temp_word;
1140 break;
1141 case 0xC8://ADD A,C
1142 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_C];
1143 if (temp_word >= 0x100)
1144 {
1145 Flags = Flags | FLAG_C;
1146 }
1147 else
1148 {
1149 Flags = Flags & (0xFF - FLAG_C);
1150 }
1151 set_flag_n((BYTE)temp_word);
1152 set_flag_z((BYTE)temp_word);
1153 Registers[REGISTER_A] = (BYTE)temp_word;
1154 break;
1155 case 0xD8://ADD A,L
1156 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_L];
1157 if (temp_word >= 0x100)
1158 {
1159 Flags = Flags | FLAG_C;
1160 }
1161 else
1162 {
1163 Flags = Flags & (0xFF - FLAG_C);
1164 }
1165 set_flag_n((BYTE)temp_word);
1166 set_flag_z((BYTE)temp_word);
1167 Registers[REGISTER_A] = (BYTE)temp_word;
1168 break;
1169 case 0xE8://ADD A,H
1170 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_H];
1171 if (temp_word >= 0x100)
1172 {
1173 Flags = Flags | FLAG_C;
1174 }
1175 else
1176 {
1177 Flags = Flags & (0xFF - FLAG_C);
1178 }
1179 set_flag_n((BYTE)temp_word);
1180 set_flag_z((BYTE)temp_word);
1181 Registers[REGISTER_A] = (BYTE)temp_word;
1182 break;
1183 case 0xF8://ADD A,M
1184 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_M];
1185 if (temp_word >= 0x100)
1186 {
1187 Flags = Flags | FLAG_C;
1188 }
1189 else
1190 {
1191 Flags = Flags & (0xFF - FLAG_C);
1192 }
1193 set_flag_n((BYTE)temp_word);
1194 set_flag_z((BYTE)temp_word);
1195 Registers[REGISTER_A] = (BYTE)temp_word;
1196 break;
1197
1198 //FLAGS
1199 case 0xA6://CLC
1200 Flags = Flags & (0xFF - FLAG_C);
1201
1202 break;
1203 case 0xA7://SEC
1204 Flags = Flags | FLAG_C;
1205 break;
1206 case 0xA8://CLI
1207 Flags = Flags & (0xFF - FLAG_I);
1208 break;
1209 case 0xA9://SEI
1210 Flags = Flags | FLAG_I;
1211 break;
1212 case 0xAA://CMC
1213 Flags = Flags ^ FLAG_C;
1214 break;
1215
1216 case 0xAE://PUSH REGISTER A
1217 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1218
1219 StackPointer--;
1220 Memory[StackPointer] = Registers[REGISTER_A];
1221 }
1222 break;
1223 case 0xBE://PUSH FLAGS
1224 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1225
1226 StackPointer--;
1227 Memory[StackPointer] = Flags;
1228 }
1229 break;
1230 case 0xCE://PUSH REGISTER B
1231 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1232
1233 StackPointer--;
1234 Memory[StackPointer] = Registers[REGISTER_B];
1235 }
1236 break;
1237 case 0xDE://PUSH REGISTER C
1238 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1239
1240 StackPointer--;
1241 Memory[StackPointer] = Registers[REGISTER_C];
1242 }
1243 break;
1244 case 0xEE://PUSH REGISTER L
1245 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1246
1247 StackPointer--;
1248 Memory[StackPointer] = Registers[REGISTER_L];
1249 }
1250 break;
1251 case 0xFE://PUSH REGISTER M
1252 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1253
1254 StackPointer--;
1255 Memory[StackPointer] = Registers[REGISTER_M];
1256 }
1257 break;
1258 case 0xAF://POP REGISTER A
1259 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1260 Registers[REGISTER_A] = Memory[StackPointer];
1261 StackPointer ++;
1262 }
1263 break;
1264 case 0xBF://POP FLAGS
1265 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1266 Flags = Memory[StackPointer];
1267 StackPointer++;
1268 }
1269 break;
1270 case 0xCF://POP REGISTER B
1271 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1272 Registers[REGISTER_B] = Memory[StackPointer];
1273 StackPointer++;
1274 }
1275 break;
1276 case 0xDF://POP REGISTER C
1277 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1278 Registers[REGISTER_C] = Memory[StackPointer];
1279 StackPointer++;
1280 }
1281 break;
1282 case 0xEF://POP REGISTER L
1283 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1284 Registers[REGISTER_L] = Memory[StackPointer];
1285 StackPointer++;
1286 }
1287 break;
1288 case 0xFF://POP REGISTER M
1289 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1290 Registers[REGISTER_M] = Memory[StackPointer];
1291 StackPointer++;
1292 }
1293 break;
1294 case 0x38: //JUMP abs
1295 LB = fetch();
1296 HB = fetch();
1297 address = ((WORD)HB<< 8) + (WORD)LB;
1298 ProgramCounter = address;
1299 break;
1300 case 0x07://JMPR abs
1301 HB = fetch();
1302 LB = fetch();
1303 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1304 StackPointer --;
1305 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1306 StackPointer --;
1307 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1308 ProgramCounter = address;
1309 }
1310 break;
1311 case 0x23: //RT impl
1312 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 2)) {
1313 LB = Memory[StackPointer];
1314 StackPointer++;
1315 HB = Memory[StackPointer];
1316 StackPointer++;
1317 ProgramCounter = ((WORD)HB << 8) + (WORD)LB;
1318 }
1319 break;
1320 case 0x95: //INCA
1321 ++Registers[REGISTER_A];
1322 set_flag_n(Registers[REGISTER_A]);
1323 set_flag_z(Registers[REGISTER_A]);
1324 break;
1325 case 0x4B: //INX impl
1326 ++Index_Registers[REGISTER_X];
1327 set_flag_z(Index_Registers[REGISTER_X]);
1328 break;
1329 case 0xBC: // AND Register A,B
1330 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_B];
1331
1332 set_flag_n((BYTE)temp_word);
1333 set_flag_z((BYTE)temp_word);
1334 Registers[REGISTER_A] = (BYTE)temp_word;
1335 break;
1336 case 0xCC: // AND Register A,C
1337 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_C];
1338
1339 set_flag_n((BYTE)temp_word);
1340 set_flag_z((BYTE)temp_word);
1341 Registers[REGISTER_A] = (BYTE)temp_word;
1342 break;
1343 case 0xDC: // AND Register A,L
1344 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_L];
1345
1346 set_flag_n((BYTE)temp_word);
1347 set_flag_z((BYTE)temp_word);
1348 Registers[REGISTER_A] = (BYTE)temp_word;
1349 break;
1350 case 0xEC: // AND Register A,H
1351 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_H];
1352
1353 set_flag_n((BYTE)temp_word);
1354 set_flag_z((BYTE)temp_word);
1355 Registers[REGISTER_A] = (BYTE)temp_word;
1356 break;
1357 case 0xFC: // AND Register A,M
1358 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_M];
1359
1360 set_flag_n((BYTE)temp_word);
1361 set_flag_z((BYTE)temp_word);
1362 Registers[REGISTER_A] = (BYTE)temp_word;
1363 break;
1364 case 0x9F: //CLRA
1365 Registers[REGISTER_A] = 0;
1366 Flags = Flags | FLAG_Z;
1367 Flags = Flags & (0xFF - FLAG_N);
1368 Flags = Flags & (0xFF - FLAG_C);
1369 break;
1370 //halt = true;
1371 case 0x39://JCC
1372 LB = fetch();
1373 HB = fetch();
1374 address = ((WORD)HB << 8) + (WORD)LB;
1375 if ((Flags & FLAG_C) == 0)
1376 {
1377 ProgramCounter = address;
1378 }
1379 break;
1380
1381 case 0x3A://JCS
1382 LB = fetch();
1383 HB = fetch();
1384 address = ((WORD)HB << 8) + (WORD)LB;
1385 if ((Flags & FLAG_C) == FLAG_C)
1386 {
1387 ProgramCounter = address;
1388 }
1389 break;
1390 case 0x3B://JNE abs
1391 LB = fetch();
1392 HB = fetch();
1393 address = ((WORD)HB << 8) + (WORD)LB;
1394 if ((Flags & FLAG_Z) == 0)
1395 {
1396 ProgramCounter = address;
1397 }
1398 break;
1399 case 0x3C://JEQ
1400 LB = fetch();
1401 HB = fetch();
1402 address = ((WORD)HB << 8) + (WORD)LB;
1403 if ((Flags & FLAG_Z) == FLAG_Z)
1404 {
1405 ProgramCounter = address;
1406 }
1407 break;
1408 case 0x3D://JMI abs
1409 LB = fetch();
1410 HB = fetch();
1411 address = ((WORD)HB << 8) + (WORD)LB;
1412 if ((Flags & FLAG_N) == FLAG_N)
1413 {
1414 ProgramCounter = address;
1415 }
1416 break;
1417 case 0x3E://JPL abs
1418 LB = fetch();
1419 HB = fetch();
1420 address = ((WORD)HB << 8) + (WORD)LB;
1421 if ((Flags & FLAG_N) == 0)
1422 {
1423 ProgramCounter = address;
1424 }
1425 break;
1426 case 0x08: //CCC abs
1427 LB = fetch();
1428 HB = fetch();
1429 address = ((WORD)HB << 8) + (WORD)LB;
1430 if ((Flags & FLAG_C) == 0)
1431 {
1432
1433 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1434 StackPointer--;
1435 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1436 StackPointer--;
1437 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1438 ProgramCounter = address;
1439 }
1440 }
1441 break;
1442 case 0x09:// CCS abs
1443 LB = fetch();
1444 HB = fetch();
1445 address = ((WORD)HB << 8) + (WORD)LB;
1446 if ((Flags & FLAG_C) == FLAG_C)
1447 {
1448 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1449 StackPointer--;
1450 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1451 StackPointer--;
1452 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1453 ProgramCounter = address;
1454 }
1455 }
1456 break;
1457
1458 case 0x0A: //CNE abs
1459 LB = fetch();
1460 HB = fetch();
1461 address = ((WORD)HB << 8) + (WORD)LB;
1462 if ((Flags & FLAG_Z) == 0)
1463 {
1464 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1465 StackPointer--;
1466 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1467 StackPointer--;
1468 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1469 ProgramCounter = address;
1470 }
1471 }
1472 break;
1473
1474 case 0x0B:// CEQ abs
1475 LB = fetch();
1476 HB = fetch();
1477 address = ((WORD)HB << 8) + (WORD)LB;
1478 if ((Flags & FLAG_Z) == FLAG_Z)
1479 {
1480 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1481 StackPointer--;
1482 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1483 StackPointer--;
1484 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1485 ProgramCounter = address;
1486 }
1487
1488 }
1489 break;
1490 case 0x0C: //CMI abs
1491 LB = fetch();
1492 HB = fetch();
1493 address = ((WORD)HB << 8) + (WORD)LB;
1494 if ((Flags & FLAG_N) == FLAG_N)
1495 {
1496 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1497 StackPointer--;
1498 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1499 StackPointer--;
1500 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1501 ProgramCounter = address;
1502 }
1503 }
1504 break;
1505
1506 case 0x0D: // CPL abs
1507 LB = fetch();
1508 HB = fetch();
1509 address = ((WORD)HB << 8) + (WORD)LB;
1510 if ((Flags & FLAG_N) == 0)
1511 {
1512 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1513 StackPointer--;
1514 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1515 StackPointer--;
1516 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1517 ProgramCounter = address;
1518 }
1519 }
1520 break;
1521 case 0x55: // INC abs
1522 LB = fetch();
1523 HB = fetch();
1524 address += (WORD)((WORD)HB << 8) + LB;
1525 ++Memory[address];
1526 set_flag_n(Memory[address]);
1527 set_flag_z(Memory[address]);
1528 break;
1529 case 0x65: // INC abs X
1530 address += Index_Registers[REGISTER_X];
1531 LB = fetch();
1532 HB = fetch();
1533 address += (WORD)((WORD)HB << 8) + LB;
1534 if (address >= 0 && address < MEMORY_SIZE)
1535 {
1536 ++Memory[address];
1537 }
1538 set_flag_n(Memory[address]);
1539 set_flag_z(Memory[address]);
1540 break;
1541 case 0x75: // INC abs Y
1542 address += Index_Registers[REGISTER_Y];
1543 LB = fetch();
1544 HB = fetch();
1545 address += (WORD)((WORD)HB << 8) + LB;
1546 if (address >= 0 && address < MEMORY_SIZE)
1547 {
1548 ++Memory[address];
1549 }
1550 set_flag_n(Memory[address]);
1551 set_flag_z(Memory[address]);
1552 break;
1553 case 0x85: // INC abs XY
1554 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1555 LB = fetch();
1556 HB = fetch();
1557 address += (WORD)((WORD)HB << 8) + LB;
1558 if (address >= 0 && address < MEMORY_SIZE)
1559 {
1560 ++Memory[address];
1561 }
1562 set_flag_n(Memory[address]);
1563 set_flag_z(Memory[address]);
1564 break;
1565 case 0x5F: // CLR abs
1566 LB = fetch();
1567 HB = fetch();
1568 address += (WORD)((WORD)HB << 8) + LB;
1569 Memory[address] = 0;
1570 Flags = Flags | FLAG_Z;
1571 Flags = Flags & (0xFF - FLAG_N);
1572 Flags = Flags & (0xFF - FLAG_C);
1573 break;
1574 case 0x6F: // CLR abs X
1575 address += Index_Registers[REGISTER_X];
1576 LB = fetch();
1577 HB = fetch();
1578 address += (WORD)((WORD)HB << 8) + LB;
1579 Memory[address] = 0;
1580 Flags = Flags | FLAG_Z;
1581 Flags = Flags & (0xFF - FLAG_N);
1582 Flags = Flags & (0xFF - FLAG_C);
1583 break;
1584 case 0x7F: // CLR abs Y
1585 address += Index_Registers[REGISTER_Y];
1586 LB = fetch();
1587 HB = fetch();
1588 address += (WORD)((WORD)HB << 8) + LB;
1589 Memory[address] = 0;
1590 Flags = Flags | FLAG_Z;
1591 Flags = Flags & (0xFF - FLAG_N);
1592 Flags = Flags & (0xFF - FLAG_C);
1593 break;
1594 case 0x8F: // CLR abs XY
1595 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1596 LB = fetch();
1597 HB = fetch();
1598 address += (WORD)((WORD)HB << 8) + LB;
1599 Memory[address] = 0;
1600 Flags = Flags | FLAG_Z;
1601 Flags = Flags & (0xFF - FLAG_N);
1602 Flags = Flags & (0xFF - FLAG_C);
1603 break;
1604 case 0x4A: // DEX imply
1605 Index_Registers[REGISTER_X]--;
1606 set_flag_z(Index_Registers[REGISTER_X]);
1607 break;
1608 case 0x4C: //DEY impl
1609 Index_Registers[REGISTER_Y]--;
1610 set_flag_z(Index_Registers[REGISTER_Y]);
1611 break;
1612 case 0x4D: //INY impl
1613 ++Index_Registers[REGISTER_Y];
1614 set_flag_z(Index_Registers[REGISTER_Y]);
1615 break;
1616 }
1617}
1618
1619void Group_2_Move(BYTE opcode){
1620
1621 BYTE source = opcode >> 4;
1622 BYTE destination = opcode & 0x0F;
1623 WORD address = 0;
1624
1625 int destReg;
1626 int sourceReg;
1627
1628 switch (destination)//MV
1629 {
1630 case 0:
1631 destReg = REGISTER_A;
1632 break;
1633 case 0x01:
1634 destReg = REGISTER_B;
1635 break;
1636
1637 case 0x02:
1638 destReg = REGISTER_C;
1639 break;
1640 case 0x03:
1641 destReg = REGISTER_L;
1642 break;
1643 case 0x04:
1644 destReg = REGISTER_H;
1645 break;
1646 case 0x05:
1647 destReg = REGISTER_M;
1648 break;
1649 }
1650 switch (source)
1651 {
1652 case 0xA:
1653 sourceReg = REGISTER_A;
1654 break;
1655 case 0xB:
1656 sourceReg = REGISTER_B;
1657 break;
1658 case 0xC:
1659 sourceReg = REGISTER_C;
1660 break;
1661 case 0xD:
1662 sourceReg = REGISTER_L;
1663 break;
1664 case 0xE:
1665 sourceReg = REGISTER_H;
1666 break;
1667 case 0xF:
1668 sourceReg = REGISTER_M;
1669 break;
1670 }
1671 if (sourceReg == REGISTER_M)
1672 {
1673 address = Registers[REGISTER_L];
1674 address += (WORD)Registers[REGISTER_H] << 8;
1675
1676 if (address >= 0 && address <= MEMORY_SIZE)
1677 {
1678 Registers[REGISTER_M] = Memory[address];
1679 }
1680
1681
1682 }
1683
1684 if (destReg == REGISTER_M)
1685 {
1686 address = Registers[REGISTER_L];
1687 address += (WORD)Registers[REGISTER_H] << 8;
1688
1689 if (address >= 0 && address <= MEMORY_SIZE)
1690 {
1691 Memory[address] = Registers[sourceReg];
1692 }
1693 }
1694 else
1695 {
1696 Registers[destReg] = Registers[sourceReg];
1697
1698 }
1699
1700 }
1701
1702
1703void execute(BYTE opcode)
1704{
1705 BYTE source = opcode >> 4;
1706 BYTE destination = opcode & 0x0F;
1707 if (((source >= 0x0A) && (source <= 0x0F)) && ((destination >= 0x00) && (destination <= 0x05)))
1708 {
1709 Group_2_Move(opcode);
1710 }
1711 else
1712 {
1713 Group_1(opcode);
1714 }
1715
1716
1717}
1718
1719void emulate()
1720{
1721 BYTE opcode;
1722 int sanity;
1723
1724 ProgramCounter = 0;
1725 halt = false;
1726 memory_in_range = true;
1727 sanity = 0;
1728
1729 printf(" A B C L H X Y SP\n");
1730
1731 while ((!halt) && (memory_in_range)) {
1732 printf("%04X ", ProgramCounter); // Print current address
1733 opcode = fetch();
1734 execute(opcode);
1735
1736 printf("%s ", opcode_mneumonics[opcode]); // Print current opcode
1737
1738 printf("%02X ", Registers[REGISTER_A]);
1739 printf("%02X ", Registers[REGISTER_B]);
1740 printf("%02X ", Registers[REGISTER_C]);
1741 printf("%02X ", Registers[REGISTER_L]);
1742 printf("%02X ", Registers[REGISTER_H]);
1743 printf("%02X ", Index_Registers[REGISTER_X]);
1744 printf("%02X ", Index_Registers[REGISTER_Y]);
1745 printf("%04X ", StackPointer); // Print Stack Pointer
1746
1747 if ((Flags & FLAG_Z) == FLAG_Z)
1748 {
1749 printf("Z=1 ");
1750 }
1751 else
1752 {
1753 printf("Z=0 ");
1754 }
1755 if ((Flags & FLAG_I) == FLAG_I)
1756 {
1757 printf("I=1 ");
1758 }
1759 else
1760 {
1761 printf("I=0 ");
1762 }
1763 if ((Flags & FLAG_N) == FLAG_N)
1764 {
1765 printf("N=1 ");
1766 }
1767 else
1768 {
1769 printf("N=0 ");
1770 }
1771 if ((Flags & FLAG_C) == FLAG_C)
1772 {
1773 printf("C=1 ");
1774 }
1775 else
1776 {
1777 printf("C=0 ");
1778 }
1779
1780 printf("\n"); // New line
1781 if (sanity > 200) halt = true;
1782
1783 sanity++;
1784 }
1785
1786 printf("\n"); // New line
1787}
1788
1789
1790////////////////////////////////////////////////////////////////////////////////
1791// Simulator/Emulator (End) //
1792////////////////////////////////////////////////////////////////////////////////
1793
1794
1795void initialise_filenames() {
1796 int i;
1797
1798 for (i=0; i<MAX_FILENAME_SIZE; i++) {
1799 hex_file [i] = '\0';
1800 trc_file [i] = '\0';
1801 }
1802}
1803
1804
1805
1806
1807int find_dot_position(char *filename) {
1808 int dot_position;
1809 int i;
1810 char chr;
1811
1812 dot_position = 0;
1813 i = 0;
1814 chr = filename[i];
1815
1816 while (chr != '\0') {
1817 if (chr == '.') {
1818 dot_position = i;
1819 }
1820 i++;
1821 chr = filename[i];
1822 }
1823
1824 return (dot_position);
1825}
1826
1827
1828int find_end_position(char *filename) {
1829 int end_position;
1830 int i;
1831 char chr;
1832
1833 end_position = 0;
1834 i = 0;
1835 chr = filename[i];
1836
1837 while (chr != '\0') {
1838 end_position = i;
1839 i++;
1840 chr = filename[i];
1841 }
1842
1843 return (end_position);
1844}
1845
1846
1847bool file_exists(char *filename) {
1848 bool exists;
1849 FILE *ifp;
1850
1851 exists = false;
1852
1853 if ( ( ifp = fopen( filename, "r" ) ) != NULL ) {
1854 exists = true;
1855
1856 fclose(ifp);
1857 }
1858
1859 return (exists);
1860}
1861
1862
1863
1864void create_file(char *filename) {
1865 FILE *ofp;
1866
1867 if ( ( ofp = fopen( filename, "w" ) ) != NULL ) {
1868 fclose(ofp);
1869 }
1870}
1871
1872
1873
1874bool getline(FILE *fp, char *buffer) {
1875 bool rc;
1876 bool collect;
1877 char c;
1878 int i;
1879
1880 rc = false;
1881 collect = true;
1882
1883 i = 0;
1884 while (collect) {
1885 c = getc(fp);
1886
1887 switch (c) {
1888 case EOF:
1889 if (i > 0) {
1890 rc = true;
1891 }
1892 collect = false;
1893 break;
1894
1895 case '\n':
1896 if (i > 0) {
1897 rc = true;
1898 collect = false;
1899 buffer[i] = '\0';
1900 }
1901 break;
1902
1903 default:
1904 buffer[i] = c;
1905 i++;
1906 break;
1907 }
1908 }
1909
1910 return (rc);
1911}
1912
1913
1914
1915
1916
1917
1918void load_and_run(int args,_TCHAR** argv) {
1919 char chr;
1920 int ln;
1921 int dot_position;
1922 int end_position;
1923 long i;
1924 FILE *ifp;
1925 long address;
1926 long load_at;
1927 int code;
1928
1929 // Prompt for the .hex file
1930
1931 printf("\n");
1932 printf("Enter the hex filename (.hex): ");
1933
1934 if(args == 2){
1935 ln = 0;
1936 chr = argv[1][ln];
1937 while (chr != '\0')
1938 {
1939 if (ln < MAX_FILENAME_SIZE)
1940 {
1941 hex_file [ln] = chr;
1942 trc_file [ln] = chr;
1943 ln++;
1944 }
1945 chr = argv[1][ln];
1946 }
1947 } else {
1948 ln = 0;
1949 chr = '\0';
1950 while (chr != '\n') {
1951 chr = getchar();
1952
1953 switch(chr) {
1954 case '\n':
1955 break;
1956 default:
1957 if (ln < MAX_FILENAME_SIZE) {
1958 hex_file [ln] = chr;
1959 trc_file [ln] = chr;
1960 ln++;
1961 }
1962 break;
1963 }
1964 }
1965
1966 }
1967 // Tidy up the file names
1968
1969 dot_position = find_dot_position(hex_file);
1970 if (dot_position == 0) {
1971 end_position = find_end_position(hex_file);
1972
1973 hex_file[end_position + 1] = '.';
1974 hex_file[end_position + 2] = 'h';
1975 hex_file[end_position + 3] = 'e';
1976 hex_file[end_position + 4] = 'x';
1977 hex_file[end_position + 5] = '\0';
1978 } else {
1979 hex_file[dot_position + 0] = '.';
1980 hex_file[dot_position + 1] = 'h';
1981 hex_file[dot_position + 2] = 'e';
1982 hex_file[dot_position + 3] = 'x';
1983 hex_file[dot_position + 4] = '\0';
1984 }
1985
1986 dot_position = find_dot_position(trc_file);
1987 if (dot_position == 0) {
1988 end_position = find_end_position(trc_file);
1989
1990 trc_file[end_position + 1] = '.';
1991 trc_file[end_position + 2] = 't';
1992 trc_file[end_position + 3] = 'r';
1993 trc_file[end_position + 4] = 'c';
1994 trc_file[end_position + 5] = '\0';
1995 } else {
1996 trc_file[dot_position + 0] = '.';
1997 trc_file[dot_position + 1] = 't';
1998 trc_file[dot_position + 2] = 'r';
1999 trc_file[dot_position + 3] = 'c';
2000 trc_file[dot_position + 4] = '\0';
2001 }
2002
2003 if (file_exists(hex_file)) {
2004 // Clear Registers and Memory
2005
2006 Registers[REGISTER_A] = 0;
2007 Registers[REGISTER_B] = 0;
2008 Registers[REGISTER_C] = 0;
2009 Registers[REGISTER_L] = 0;
2010 Registers[REGISTER_H] = 0;
2011 Index_Registers[REGISTER_X] = 0;
2012 Index_Registers[REGISTER_Y] = 0;
2013 Flags = 0;
2014 ProgramCounter = 0;
2015 StackPointer = 0;
2016
2017 for (i=0; i<MEMORY_SIZE; i++) {
2018 Memory[i] = 0x00;
2019 }
2020
2021 // Load hex file
2022
2023 if ( ( ifp = fopen( hex_file, "r" ) ) != NULL ) {
2024 printf("Loading file...\n\n");
2025
2026 load_at = 0;
2027
2028 while (getline(ifp, InputBuffer)) {
2029 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
2030 load_at = address;
2031 } else if (sscanf(InputBuffer, "%x", &code) == 1) {
2032 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
2033 Memory[load_at] = (BYTE)code;
2034 }
2035 load_at++;
2036 } else {
2037 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
2038 }
2039 }
2040
2041 fclose(ifp);
2042 }
2043
2044 // Emulate
2045
2046 emulate();
2047 } else {
2048 printf("\n");
2049 printf("ERROR> Input file %s does not exist!\n", hex_file);
2050 printf("\n");
2051 }
2052}
2053
2054void building(int args,_TCHAR** argv){
2055 char buffer[1024];
2056 load_and_run(args,argv);
2057 sprintf(buffer, "0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X",
2058 Memory[TEST_ADDRESS_1],
2059 Memory[TEST_ADDRESS_2],
2060 Memory[TEST_ADDRESS_3],
2061 Memory[TEST_ADDRESS_4],
2062 Memory[TEST_ADDRESS_5],
2063 Memory[TEST_ADDRESS_6],
2064 Memory[TEST_ADDRESS_7],
2065 Memory[TEST_ADDRESS_8],
2066 Memory[TEST_ADDRESS_9],
2067 Memory[TEST_ADDRESS_10],
2068 Memory[TEST_ADDRESS_11],
2069 Memory[TEST_ADDRESS_12]
2070 );
2071 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2072}
2073
2074
2075
2076void test_and_mark() {
2077 char buffer[1024];
2078 bool testing_complete;
2079 int len = sizeof(SOCKADDR);
2080 char chr;
2081 int i;
2082 int j;
2083 bool end_of_program;
2084 long address;
2085 long load_at;
2086 int code;
2087 int mark;
2088 int passed;
2089
2090 printf("\n");
2091 printf("Automatic Testing and Marking\n");
2092 printf("\n");
2093
2094 testing_complete = false;
2095
2096 sprintf(buffer, "Test Student %s", STUDENT_NUMBER);
2097 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2098
2099 while (!testing_complete) {
2100 memset(buffer, '\0', sizeof(buffer));
2101
2102 if (recvfrom(sock, buffer, sizeof(buffer)-1, 0, (SOCKADDR *)&client_addr, &len) != SOCKET_ERROR) {
2103 printf("Incoming Data: %s \n", buffer);
2104
2105 //if (strcmp(buffer, "Testing complete") == 1)
2106 if (sscanf(buffer, "Testing complete %d", &mark) == 1) {
2107 testing_complete = true;
2108 printf("Current mark = %d\n", mark);
2109
2110 }else if (sscanf(buffer, "Tests passed %d", &passed) == 1) {
2111 //testing_complete = true;
2112 printf("Passed = %d\n", passed);
2113
2114 } else if (strcmp(buffer, "Error") == 0) {
2115 printf("ERROR> Testing abnormally terminated\n");
2116 testing_complete = true;
2117 } else {
2118 // Clear Registers and Memory
2119
2120 Registers[REGISTER_A] = 0;
2121 Registers[REGISTER_B] = 0;
2122 Registers[REGISTER_C] = 0;
2123 Registers[REGISTER_L] = 0;
2124 Registers[REGISTER_H] = 0;
2125 Index_Registers[REGISTER_X] = 0;
2126 Index_Registers[REGISTER_Y] = 0;
2127 Flags = 0;
2128 ProgramCounter = 0;
2129 StackPointer = 0;
2130 for (i=0; i<MEMORY_SIZE; i++) {
2131 Memory[i] = 0;
2132 }
2133
2134 // Load hex file
2135
2136 i = 0;
2137 j = 0;
2138 load_at = 0;
2139 end_of_program = false;
2140 FILE *ofp;
2141 fopen_s(&ofp ,"branch.txt", "a");
2142
2143 while (!end_of_program) {
2144 chr = buffer[i];
2145 switch (chr) {
2146 case '\0':
2147 end_of_program = true;
2148
2149 case ',':
2150 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
2151 load_at = address;
2152 } else if (sscanf(InputBuffer, "%x", &code) == 1) {
2153 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
2154 Memory[load_at] = (BYTE)code;
2155 fprintf(ofp, "%02X\n", (BYTE)code);
2156 }
2157 load_at++;
2158 } else {
2159 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
2160 }
2161 j = 0;
2162 break;
2163
2164 default:
2165 InputBuffer[j] = chr;
2166 j++;
2167 break;
2168 }
2169 i++;
2170 }
2171 fclose(ofp);
2172 // Emulate
2173
2174 if (load_at > 1) {
2175 emulate();
2176 // Send and store results
2177 sprintf(buffer, "%02X%02X %02X%02X %02X%02X %02X%02X %02X%02X %02X%02X",
2178 Memory[TEST_ADDRESS_1],
2179 Memory[TEST_ADDRESS_2],
2180 Memory[TEST_ADDRESS_3],
2181 Memory[TEST_ADDRESS_4],
2182 Memory[TEST_ADDRESS_5],
2183 Memory[TEST_ADDRESS_6],
2184 Memory[TEST_ADDRESS_7],
2185 Memory[TEST_ADDRESS_8],
2186 Memory[TEST_ADDRESS_9],
2187 Memory[TEST_ADDRESS_10],
2188 Memory[TEST_ADDRESS_11],
2189 Memory[TEST_ADDRESS_12]
2190 );
2191 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2192 }
2193 }
2194 }
2195 }
2196}
2197
2198
2199
2200int _tmain(int argc, _TCHAR* argv[])
2201{
2202 char chr;
2203 char dummy;
2204
2205 printf("\n");
2206 printf("Microprocessor Emulator\n");
2207 printf("UWE Computer and Network Systems Assignment 1\n");
2208 printf("\n");
2209
2210 initialise_filenames();
2211
2212 if (WSAStartup(MAKEWORD(2, 2), &data) != 0) return(0);
2213
2214 sock = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); // Here we create our socket, which will be a UDP socket (SOCK_DGRAM).
2215 if (!sock) {
2216 // Creation failed!
2217 }
2218
2219 memset(&server_addr, 0, sizeof(SOCKADDR_IN));
2220 server_addr.sin_family = AF_INET;
2221 server_addr.sin_addr.s_addr = inet_addr(IP_ADDRESS_SERVER);
2222 server_addr.sin_port = htons(PORT_SERVER);
2223
2224 memset(&client_addr, 0, sizeof(SOCKADDR_IN));
2225 client_addr.sin_family = AF_INET;
2226 client_addr.sin_addr.s_addr = inet_addr("127.0.0.1");
2227 client_addr.sin_port = htons(PORT_CLIENT);
2228
2229 chr = '\0';
2230 while ((chr != 'e') && (chr != 'E'))
2231 {
2232 printf("\n");
2233 printf("Please select option\n");
2234 printf("L - Load and run a hex file\n");
2235 printf("T - Have the server test and mark your emulator\n");
2236 printf("E - Exit\n");
2237 if(argc == 2){ building(argc,argv); exit(0);}
2238 printf("Enter option: ");
2239 chr = getchar();
2240 if (chr != 0x0A)
2241 {
2242 dummy = getchar(); // read in the <CR>
2243 }
2244 printf("\n");
2245
2246 switch (chr)
2247 {
2248 case 'L':
2249 case 'l':
2250 load_and_run(argc,argv);
2251 break;
2252
2253 case 'T':
2254 case 't':
2255 test_and_mark();
2256 break;
2257
2258 default:
2259 break;
2260 }
2261 }
2262
2263 closesocket(sock);
2264 WSACleanup();
2265
2266
2267 return 0;
2268}