· 8 years ago · Feb 16, 2018, 05:42 PM
1#include "stdafx.h"
2#include <winsock2.h>
3
4#pragma comment(lib, "wsock32.lib")
5
6
7#define STUDENT_NUMBER "17028593"
8
9#define IP_ADDRESS_SERVER "127.0.0.1"
10
11#define PORT_SERVER 0x1984 // We define a port that we are going to use.
12#define PORT_CLIENT 0x1985 // We define a port that we are going to use.
13
14#define WORD unsigned short
15#define DWORD unsigned long
16#define BYTE unsigned char
17
18#define MAX_FILENAME_SIZE 500
19#define MAX_BUFFER_SIZE 500
20
21SOCKADDR_IN server_addr;
22SOCKADDR_IN client_addr;
23
24SOCKET sock; // This is our socket, it is the handle to the IO address to read/write packets
25
26WSADATA data;
27
28char InputBuffer[MAX_BUFFER_SIZE];
29
30char hex_file[MAX_BUFFER_SIZE];
31char trc_file[MAX_BUFFER_SIZE];
32
33//////////////////////////
34// Registers //
35//////////////////////////
36
37#define FLAG_I 0x10
38#define FLAG_V 0x08
39#define FLAG_N 0x04
40#define FLAG_Z 0x02
41#define FLAG_C 0x01
42#define REGISTER_A 5
43#define REGISTER_F 4
44#define REGISTER_E 3
45#define REGISTER_D 2
46#define REGISTER_C 1
47#define REGISTER_B 0
48#define REGISTER_X 0
49#define REGISTER_Y 1
50BYTE Index_Registers[2];
51
52BYTE Registers[6];
53BYTE Flags;
54WORD ProgramCounter;
55WORD StackPointer;
56
57
58////////////
59// Memory //
60////////////
61
62#define MEMORY_SIZE 65536
63
64BYTE Memory[MEMORY_SIZE];
65
66#define TEST_ADDRESS_1 0x01FA
67#define TEST_ADDRESS_2 0x01FB
68#define TEST_ADDRESS_3 0x01FC
69#define TEST_ADDRESS_4 0x01FD
70#define TEST_ADDRESS_5 0x01FE
71#define TEST_ADDRESS_6 0x01FF
72#define TEST_ADDRESS_7 0x0200
73#define TEST_ADDRESS_8 0x0201
74#define TEST_ADDRESS_9 0x0202
75#define TEST_ADDRESS_10 0x0203
76#define TEST_ADDRESS_11 0x0204
77#define TEST_ADDRESS_12 0x0205
78
79
80///////////////////////
81// Control variables //
82///////////////////////
83
84bool memory_in_range = true;
85bool halt = false;
86
87
88///////////////////////
89// Disassembly table //
90///////////////////////
91
92char opcode_mneumonics[][14] =
93{
94 "ILLEGAL ",
95 "ILLEGAL ",
96 "STX abs ",
97 "ILLEGAL ",
98 "ILLEGAL ",
99 "ILLEGAL ",
100 "ILLEGAL ",
101 "MV #,B ",
102 "MV #,C ",
103 "MV #,D ",
104 "MV #,E ",
105 "MV #,F ",
106 "MAY impl ",
107 "MYA impl ",
108 "MAS impl ",
109 "CSA impl ",
110
111 "ILLEGAL ",
112 "ILLEGAL ",
113 "STX abs,X ",
114 "ILLEGAL ",
115 "ILLEGAL ",
116 "ILLEGAL ",
117 "SWI impl ",
118 "RTI impl ",
119 "CLC impl ",
120 "SEC impl ",
121 "CLI impl ",
122 "STI impl ",
123 "STV impl ",
124 "CLV impl ",
125 "ILLEGAL ",
126 "ILLEGAL ",
127
128 "ILLEGAL ",
129 "ILLEGAL ",
130 "STX abs,Y ",
131 "ADD A,B ",
132 "SUB A,B ",
133 "CMP A,B ",
134 "OR A,B ",
135 "AND A,B ",
136 "EOR A,B ",
137 "BT A,B ",
138 "LD A,A ",
139 "LD B,A ",
140 "LD C,A ",
141 "LD D,A ",
142 "LD E,A ",
143 "LD F,A ",
144
145 "ILLEGAL ",
146 "LDX # ",
147 "STX abs,XY ",
148 "ADD A,C ",
149 "SUB A,C ",
150 "CMP A,C ",
151 "OR A,C ",
152 "AND A,C ",
153 "EOR A,C ",
154 "BT A,C ",
155 "LD A,B ",
156 "LD B,B ",
157 "LD C,B ",
158 "LD D,B ",
159 "LD E,B ",
160 "LD F,B ",
161
162 "ILLEGAL ",
163 "LDX abs ",
164 "STX (ind),XY ",
165 "ADD A,D ",
166 "SUB A,D ",
167 "CMP A,D ",
168 "OR A,D ",
169 "AND A,D ",
170 "EOR A,D ",
171 "BT A,D ",
172 "LD A,C ",
173 "LD B,C ",
174 "LD C,C ",
175 "LD D,C ",
176 "LD E,C ",
177 "LD F,C ",
178
179 "ILLEGAL ",
180 "LDX abs,X ",
181 "ILLEGAL ",
182 "ADD A,E ",
183 "SUB A,E ",
184 "CMP A,E ",
185 "OR A,E ",
186 "AND A,E ",
187 "EOR A,E ",
188 "BT A,E ",
189 "LD A,D ",
190 "LD B,D ",
191 "LD C,D ",
192 "LD D,D ",
193 "LD E,D ",
194 "LD F,D ",
195
196 "ILLEGAL ",
197 "LDX abs,Y ",
198 "ILLEGAL ",
199 "ADD A,F ",
200 "SUB A,F ",
201 "CMP A,F ",
202 "OR A,F ",
203 "AND A,F ",
204 "EOR A,F ",
205 "BT A,F ",
206 "LD A,E ",
207 "LD B,E ",
208 "LD C,E ",
209 "LD D,E ",
210 "LD E,E ",
211 "LD F,E ",
212
213 "ILLEGAL ",
214 "LDX abs,XY ",
215 "ILLEGAL ",
216 "NOP impl ",
217 "HLT impl ",
218 "ILLEGAL ",
219 "ILLEGAL ",
220 "ILLEGAL ",
221 "ILLEGAL ",
222 "ILLEGAL ",
223 "LD A,F ",
224 "LD B,F ",
225 "LD C,F ",
226 "LD D,F ",
227 "LD E,F ",
228 "LD F,F ",
229
230 "ILLEGAL ",
231 "LDX (ind),XY ",
232 "ADI # ",
233 "SBI # ",
234 "CPI # ",
235 "ORI # ",
236 "ANI # ",
237 "XRI # ",
238 "ILLEGAL ",
239 "ILLEGAL ",
240 "ILLEGAL ",
241 "ILLEGAL ",
242 "ILLEGAL ",
243 "ILLEGAL ",
244 "ILLEGAL ",
245 "ILLEGAL ",
246
247 "LDA # ",
248 "TST abs ",
249 "INC abs ",
250 "DEC abs ",
251 "RCR abs ",
252 "RLC abs ",
253 "ASL abs ",
254 "SAR abs ",
255 "COM abs ",
256 "RAL abs ",
257 "ROR abs ",
258 "LX #,A ",
259 "ILLEGAL ",
260 "LODS # ",
261 "PUSH ,A ",
262 "POP A, ",
263
264 "LDA abs ",
265 "TST abs,X ",
266 "INC abs,X ",
267 "DEC abs,X ",
268 "RCR abs,X ",
269 "RLC abs,X ",
270 "ASL abs,X ",
271 "SAR abs,X ",
272 "COM abs,X ",
273 "RAL abs,X ",
274 "ROR abs,X ",
275 "ILLEGAL ",
276 "STO abs ",
277 "LODS abs ",
278 "PUSH ,s ",
279 "POP s, ",
280
281 "LDA abs,X ",
282 "TST abs,Y ",
283 "INC abs,Y ",
284 "DEC abs,Y ",
285 "RCR abs,Y ",
286 "RLC abs,Y ",
287 "ASL abs,Y ",
288 "SAR abs,Y ",
289 "COM abs,Y ",
290 "RAL abs,Y ",
291 "ROR abs,Y ",
292 "ILLEGAL ",
293 "STO abs,X ",
294 "LODS abs,X ",
295 "PUSH ,B ",
296 "POP B, ",
297
298 "LDA abs,Y ",
299 "TST abs,XY ",
300 "INC abs,XY ",
301 "DEC abs,XY ",
302 "RCR abs,XY ",
303 "RLC abs,XY ",
304 "ASL abs,XY ",
305 "SAR abs,XY ",
306 "COM abs,XY ",
307 "RAL abs,XY ",
308 "ROR abs,XY ",
309 "ILLEGAL ",
310 "STO abs,Y ",
311 "LODS abs,Y ",
312 "PUSH ,C ",
313 "POP C, ",
314
315 "LDA abs,XY ",
316 "TSTA A,A ",
317 "INCA A,A ",
318 "DECA A,A ",
319 "RCRA A,A ",
320 "RLCA A,A ",
321 "ASLA A,A ",
322 "SARA A,A ",
323 "COMA A,A ",
324 "RALA A,A ",
325 "RORA A,A ",
326 "RTN impl ",
327 "STO abs,XY ",
328 "LODS abs,XY ",
329 "PUSH ,D ",
330 "POP D, ",
331
332 "LDA (ind),XY ",
333 "DEX impl ",
334 "INX impl ",
335 "DEY impl ",
336 "INCY impl ",
337 "ILLEGAL ",
338 "ILLEGAL ",
339 "ILLEGAL ",
340 "ILLEGAL ",
341 "JSR abs ",
342 "JMP abs ",
343 "ILLEGAL ",
344 "STO (ind),XY ",
345 "LODS (ind),XY",
346 "PUSH ,E ",
347 "POP E, ",
348
349 "BRA rel ",
350 "BCC rel ",
351 "BCS rel ",
352 "BNE rel ",
353 "BEQ rel ",
354 "BVC rel ",
355 "BVS rel ",
356 "BMI rel ",
357 "BPL rel ",
358 "BGE rel ",
359 "BLE rel ",
360 "BGT rel ",
361 "BLT rel ",
362 "ILLEGAL ",
363 "PUSH ,F ",
364 "POP F, ",
365
366};
367
368////////////////////////////////////////////////////////////////////////////////
369// Simulator/Emulator (Start) //
370////////////////////////////////////////////////////////////////////////////////
371
372BYTE fetch()
373{
374 BYTE byte = 0;
375
376 if ((ProgramCounter >= 0) && (ProgramCounter <= MEMORY_SIZE))
377 {
378 memory_in_range = true;
379 byte = Memory[ProgramCounter];
380 ProgramCounter++;
381 }
382 else
383 {
384 memory_in_range = false;
385 }
386 return byte;
387}
388
389
390void set_flag_n(BYTE inReg)
391{
392 BYTE reg;
393 reg = inReg;
394
395 if ((reg & 0x80) != 0) // msbit set
396 {
397 Flags = Flags | FLAG_N;
398 }
399 else
400 {
401 Flags = Flags & (0xFF - FLAG_N);
402 }
403}
404
405void set_flag_z(BYTE inReg)
406{
407 BYTE reg;
408 reg = inReg;
409
410 if (reg = 0) // msbit set
411 {
412 Flags = Flags | FLAG_Z;
413 }
414 else
415 {
416 Flags = Flags & (0xFF - FLAG_Z);
417 }
418}
419
420void set_flag_v(BYTE in1, BYTE in2, BYTE out1)
421{
422 BYTE reg1in;
423 BYTE reg2in;
424 BYTE regOut;
425 reg1in = in1;
426 reg2in = in2;
427 regOut = out1;
428
429 //Overflow flag
430}
431
432void Group_1(BYTE opcode)
433{
434 BYTE LB = 0;
435 BYTE HB = 0;
436 WORD address = 0;
437 WORD data = 0;
438 WORD temp_word = 0;
439 WORD offset;
440
441 switch (opcode)
442 {
443
444 case 0x90: //LDA (Immediate)
445 data = fetch();
446 Registers[REGISTER_A] = data;
447 set_flag_n(Registers[REGISTER_A]);
448 set_flag_z(Registers[REGISTER_A]);
449
450 break;
451
452 case 0xA0: //LDA (Absolute)
453 HB = fetch();
454 LB = fetch();
455 address += (WORD)((WORD)HB << 8) + LB;
456 if (address >= 0 && address < MEMORY_SIZE) {
457 Registers[REGISTER_A] = Memory[address];
458 }
459
460 set_flag_n(Registers[REGISTER_A]);
461 set_flag_z(Registers[REGISTER_A]);
462 break;
463
464 case 0xB0: //LDA (Absolute Index X)
465 address += Index_Registers[REGISTER_X];
466 HB = fetch();
467 LB = fetch();
468 address += (WORD)((WORD)HB << 8) + LB;
469 if (address >= 0 && address < MEMORY_SIZE) {
470 Registers[REGISTER_A] = Memory[address];
471 }
472 set_flag_n(Registers[REGISTER_A]);
473 set_flag_z(Registers[REGISTER_A]);
474 break;
475
476 case 0xC0: //LDA (Absolute Index Y)
477 address += Index_Registers[REGISTER_Y];
478 HB = fetch();
479 LB = fetch();
480 address += (WORD)((WORD)HB << 8) + LB;
481 if (address >= 0 && address < MEMORY_SIZE) {
482 Registers[REGISTER_A] = Memory[address];
483 }
484 set_flag_n(Registers[REGISTER_A]);
485 set_flag_z(Registers[REGISTER_A]);
486 break;
487
488 case 0xD0: //LDA (Absolute Index XY)
489 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
490 HB = fetch();
491 LB = fetch();
492 address += (WORD)((WORD)HB << 8) + LB;
493 if (address >= 0 && address < MEMORY_SIZE) {
494 Registers[REGISTER_A] = Memory[address];
495 }
496 set_flag_n(Registers[REGISTER_A]);
497 set_flag_z(Registers[REGISTER_A]);
498 break;
499
500 case 0xE0: //LDA (Indirect XY)
501 HB = fetch();
502 LB = fetch();
503 address = (WORD)((WORD)HB << 8) + LB;
504 HB = Memory[address];
505 LB = Memory[address + 1];
506 address = (WORD)((WORD)HB << 8) + LB;
507 address += Index_Registers[REGISTER_X];
508 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
509 if (address >= 0 && address < MEMORY_SIZE) {
510 Registers[REGISTER_A] = Memory[address];
511 }
512 set_flag_n(Registers[REGISTER_A]);
513 set_flag_z(Registers[REGISTER_A]);
514 break;
515 //***********************************************//
516 // END of LDA //
517 //***********************************************//
518
519 case 0x31: //LDX (Immediate)
520 data = fetch();
521 Memory[address] = Registers[REGISTER_X];
522 set_flag_n(Registers[REGISTER_X]);
523 set_flag_z(Registers[REGISTER_X]);
524
525 break;
526
527 case 0x41: //LDX (Absolute)
528 HB = fetch();
529 LB = fetch();
530 address += (WORD)((WORD)HB << 8) + LB;
531 if (address >= 0 && address < MEMORY_SIZE) {
532 Memory[address] = Registers[REGISTER_X];
533 }
534 set_flag_n(Registers[REGISTER_X]);
535 set_flag_z(Registers[REGISTER_X]);
536 break;
537
538 case 0x51: //LDX (Absolute Index X)
539 address += Index_Registers[REGISTER_X];
540 HB = fetch();
541 LB = fetch();
542 address += (WORD)((WORD)HB << 8) + LB;
543 if (address >= 0 && address < MEMORY_SIZE) {
544 Memory[address] = Registers[REGISTER_X];
545 }
546 set_flag_n(Registers[REGISTER_X]);
547 set_flag_z(Registers[REGISTER_X]);
548 break;
549
550 case 0x61: //LDX (Absolute Index Y)
551 address += Index_Registers[REGISTER_Y];
552 HB = fetch();
553 LB = fetch();
554 address += (WORD)((WORD)HB << 8) + LB;
555 if (address >= 0 && address < MEMORY_SIZE) {
556 Memory[address] = Registers[REGISTER_X];
557 }
558 set_flag_n(Registers[REGISTER_X]);
559 set_flag_z(Registers[REGISTER_X]);
560 break;
561
562 case 0x71: //LDX (Absolute Index XY)
563 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
564 HB = fetch();
565 LB = fetch();
566 address += (WORD)((WORD)HB << 8) + LB;
567 if (address >= 0 && address < MEMORY_SIZE) {
568 Memory[address] = Registers[REGISTER_X];
569 }
570 set_flag_n(Registers[REGISTER_X]);
571 set_flag_z(Registers[REGISTER_X]);
572 break;
573
574 case 0x81: //LDX (Indirect XY)
575 HB = fetch();
576 LB = fetch();
577 address = (WORD)((WORD)HB << 8) + LB;
578 HB = Memory[address];
579 LB = Memory[address + 1];
580 address = (WORD)((WORD)HB << 8) + LB;
581 address += Index_Registers[REGISTER_X];
582 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
583 if (address >= 0 && address < MEMORY_SIZE) {
584 Memory[address] = Registers[REGISTER_X];
585 }
586 set_flag_n(Registers[REGISTER_X]);
587 set_flag_z(Registers[REGISTER_X]);
588 break;
589
590 //***********************************************//
591 // END of LDX //
592 //***********************************************//
593
594 case 0xAC: //STO (Absolute)
595 HB = fetch();
596 LB = fetch();
597 address += (WORD)((WORD)HB << 8) + LB;
598 if (address >= 0 && address < MEMORY_SIZE) {
599 Memory[address] = Registers[REGISTER_A];
600 }
601 set_flag_n(Memory[address]);
602 set_flag_z(Memory[address]);
603 break;
604
605 case 0xBC: //STO (Absolute Index X)
606 address += Index_Registers[REGISTER_X];
607 HB = fetch();
608 LB = fetch();
609 address += (WORD)((WORD)HB << 8) + LB;
610 if (address >= 0 && address < MEMORY_SIZE) {
611 Memory[address] = Registers[REGISTER_A];
612 }
613
614 break;
615
616 case 0xCC: //STO (Absolute Index Y)
617 address += Index_Registers[REGISTER_Y];
618 HB = fetch();
619 LB = fetch();
620 address += (WORD)((WORD)HB << 8) + LB;
621 if (address >= 0 && address < MEMORY_SIZE) {
622 Memory[address] = Registers[REGISTER_A];
623 }
624 break;
625
626 case 0xDC: //STO (Absolute Index XY)
627 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
628 HB = fetch();
629 LB = fetch();
630 address += (WORD)((WORD)HB << 8) + LB;
631 if (address >= 0 && address < MEMORY_SIZE) {
632 Memory[address] = Registers[REGISTER_A];
633 }
634
635 break;
636
637 case 0xEC: //STO (Indirect XY)
638 HB = fetch();
639 LB = fetch();
640 address = (WORD)((WORD)HB << 8) + LB;
641 HB = Memory[address];
642 LB = Memory[address + 1];
643 address = (WORD)((WORD)HB << 8) + LB;
644 address += Index_Registers[REGISTER_X];
645 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
646 if (address >= 0 && address < MEMORY_SIZE) {
647 Memory[address] = Registers[REGISTER_A];
648 }
649
650 break;
651
652 //***********************************************//
653 // END of STO //
654 //***********************************************//
655
656 case 0x07: //MV Register B
657 data = fetch();
658 Registers[REGISTER_B] = data;
659 set_flag_n(Registers[REGISTER_B]);
660 set_flag_z(Registers[REGISTER_B]);
661 break;
662
663 case 0x08: //MV Register C
664 data = fetch();
665 Registers[REGISTER_C] = data;
666 set_flag_n(Registers[REGISTER_C]);
667 set_flag_z(Registers[REGISTER_C]);
668 break;
669
670 case 0x09: //MV Register D
671 data = fetch();
672 Registers[REGISTER_D] = data;
673 set_flag_n(Registers[REGISTER_D]);
674 set_flag_z(Registers[REGISTER_D]);
675 break;
676
677 case 0x0A: //MV Register E
678 data = fetch();
679 Registers[REGISTER_E] = data;
680 set_flag_n(Registers[REGISTER_E]);
681 set_flag_z(Registers[REGISTER_E]);
682 break;
683
684 case 0x0B: //MV Register F
685 data = fetch();
686 Registers[REGISTER_F] = data;
687 set_flag_n(Registers[REGISTER_F]);
688 set_flag_z(Registers[REGISTER_F]);
689 break;
690
691
692
693
694 //***********************************************//
695 // END of MV //
696 //***********************************************//
697
698 case 0x9D: //LODS Immediate
699 data = fetch();
700 StackPointer = data << 8;
701 StackPointer += fetch();
702
703 break;
704
705 case 0xAD: //LODS Absolute
706 HB = fetch();
707 LB = fetch();
708 address = (WORD)((WORD)HB << 8) + LB;
709 if (address >= 0 && address < MEMORY_SIZE - 1) {
710 StackPointer = (WORD)Memory[address] << 8;
711 StackPointer += Memory[address + 1];
712 }
713
714 break;
715
716 case 0xBD: //LODS Absolute Index X
717 address += Index_Registers[REGISTER_X];
718 HB = fetch();
719 LB = fetch();
720 address = (WORD)((WORD)HB << 8) + LB;
721 if (address >= 0 && address < MEMORY_SIZE - 1) {
722 StackPointer = (WORD)Memory[address] << 8;
723 StackPointer += Memory[address + 1];
724 }
725
726 break;
727
728 case 0xCD: //LODS Absolute Index Y
729 address += Index_Registers[REGISTER_Y];
730 HB = fetch();
731 LB = fetch();
732 address = (WORD)((WORD)HB << 8) + LB;
733 if (address >= 0 && address < MEMORY_SIZE - 1) {
734 StackPointer = (WORD)Memory[address] << 8;
735 StackPointer += Memory[address + 1];
736 }
737
738 break;
739
740 case 0xDD: //LODS Absolute Index XY
741 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
742 HB = fetch();
743 LB = fetch();
744 address = (WORD)((WORD)HB << 8) + LB;
745 if (address >= 0 && address < MEMORY_SIZE - 1) {
746 StackPointer = (WORD)Memory[address] << 8;
747 StackPointer += Memory[address + 1];
748 }
749
750 break;
751
752 case 0xED: //LODS Indirect Index XY
753 HB = fetch();
754 LB = fetch();
755 address = (WORD)((WORD)HB << 8) + LB;
756 HB = Memory[address];
757 LB = Memory[address + 1];
758 address = (WORD)((WORD)HB << 8) + LB;
759 address += Index_Registers[REGISTER_X];
760 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
761 if (address >= 0 && address < MEMORY_SIZE - 1) {
762 StackPointer = (WORD)Memory[address] << 8;
763 StackPointer += Memory[address + 1];
764 }
765
766 break;
767 //***********************************************//
768 // END of LODS //
769 //***********************************************//
770 case 0x23: //ADD AB
771 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_B];
772 if ((Flags & FLAG_C) != 0) {
773 temp_word++;
774 }
775
776 if (temp_word >= 0x100) {
777 //Set carry flag
778 Flags = Flags | FLAG_C;
779 }
780 else {
781 //Clear carry flag
782 Flags = Flags & (0xFF - FLAG_C);
783 }
784 set_flag_n((BYTE)temp_word);
785 set_flag_z((BYTE)temp_word);
786 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_B], (BYTE)temp_word);
787 Registers[REGISTER_A] = (BYTE)temp_word; //Copy result back into accumulator
788
789 break;
790
791 case 0x33: //ADD AC
792 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_C];
793 if ((Flags & FLAG_C) != 0) {
794 temp_word++;
795 }
796
797 if (temp_word >= 0x100) {
798 //Set carry flag
799 Flags = Flags | FLAG_C;
800 }
801 else {
802 //Clear carry flag
803 Flags = Flags & (0xFF - FLAG_C);
804 }
805 set_flag_n((BYTE)temp_word);
806 set_flag_z((BYTE)temp_word);
807 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_C], (BYTE)temp_word);
808 Registers[REGISTER_A] = (BYTE)temp_word;
809
810 break;
811
812 case 0x43: //ADD AD
813 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_D];
814 if ((Flags & FLAG_C) != 0) {
815 temp_word++;
816 }
817
818 if (temp_word >= 0x100) {
819 //Set carry flag
820 Flags = Flags | FLAG_C;
821 }
822 else {
823 //Clear carry flag
824 Flags = Flags & (0xFF - FLAG_C);
825 }
826 set_flag_n((BYTE)temp_word);
827 set_flag_z((BYTE)temp_word);
828 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_D], (BYTE)temp_word);
829 Registers[REGISTER_A] = (BYTE)temp_word;
830
831 break;
832
833 case 0x53: //ADD AE
834 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_E];
835 if ((Flags & FLAG_C) != 0) {
836 temp_word++;
837 }
838
839 if (temp_word >= 0x100) {
840 //Set carry flag
841 Flags = Flags | FLAG_C;
842 }
843 else {
844 //Clear carry flag
845 Flags = Flags & (0xFF - FLAG_C);
846 }
847 set_flag_n((BYTE)temp_word);
848 set_flag_z((BYTE)temp_word);
849 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_E], (BYTE)temp_word);
850 Registers[REGISTER_A] = (BYTE)temp_word;
851
852 break;
853
854 case 0x63: //ADD AF
855 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_F];
856 if ((Flags & FLAG_C) != 0) {
857 temp_word++;
858 }
859
860 if (temp_word >= 0x100) {
861 //Set carry flag
862 Flags = Flags | FLAG_C;
863 }
864 else {
865 //Clear carry flag
866 Flags = Flags & (0xFF - FLAG_C);
867 }
868 set_flag_n((BYTE)temp_word);
869 set_flag_z((BYTE)temp_word);
870 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_F], (BYTE)temp_word);
871 Registers[REGISTER_A] = (BYTE)temp_word;
872
873 break;
874
875
876 //***********************************************//
877 // END of ADD //
878 //***********************************************//
879
880 case 0x24: //Sub AB
881 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_B];
882 if ((Flags & FLAG_C) != 0) {
883 temp_word--;
884 }
885
886 if (temp_word >= 0x100) {
887 //Set carry flag
888 Flags = Flags | FLAG_C;
889 }
890 else {
891 //Clear carry flag
892 Flags = Flags & (0xFF - FLAG_C);
893 }
894 set_flag_n((BYTE)temp_word);
895 set_flag_z((BYTE)temp_word);
896 set_flag_v(Registers[REGISTER_A], -Registers[REGISTER_B], (BYTE)temp_word);
897 Registers[REGISTER_A] = (BYTE)temp_word;
898 //accumulator adds it back over
899 break;
900
901 case 0x34: //Sub AC
902 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_C];
903 if ((Flags & FLAG_C) != 0) {
904 temp_word--;
905 }
906
907 if (temp_word >= 0x100) {
908 //Set (Carry flag)
909 Flags = Flags | FLAG_C;
910 }
911 else {
912 //Clear (arry flag)
913 Flags = Flags & (0xFF - FLAG_C);
914 }
915 set_flag_n((BYTE)temp_word);
916 set_flag_z((BYTE)temp_word);
917 set_flag_v(Registers[REGISTER_A], -Registers[REGISTER_C], (BYTE)temp_word);
918 Registers[REGISTER_A] = (BYTE)temp_word;
919
920 break;
921
922 case 0x44: //Sub (AD)
923 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_D];
924 if ((Flags & FLAG_C) != 0) {
925 temp_word--;
926 }
927
928 if (temp_word >= 0x100) {
929 //Set carry flag
930 Flags = Flags | FLAG_C;
931 }
932 else {
933 //Clear carry flag
934 Flags = Flags & (0xFF - FLAG_C);
935 }
936 set_flag_n((BYTE)temp_word);
937 set_flag_z((BYTE)temp_word);
938 set_flag_v(Registers[REGISTER_A], -Registers[REGISTER_D], (BYTE)temp_word);
939 Registers[REGISTER_A] = (BYTE)temp_word;
940
941 break;
942
943 case 0x54: //Sub (AE)
944 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_E];
945 if ((Flags & FLAG_C) != 0) {
946 temp_word--;
947 }
948
949 if (temp_word >= 0x100) {
950 //Set carry flag
951 Flags = Flags | FLAG_C;
952 }
953 else {
954 //Clear carry flag
955 Flags = Flags & (0xFF - FLAG_C);
956 }
957 set_flag_n((BYTE)temp_word);
958 set_flag_z((BYTE)temp_word);
959 set_flag_v(Registers[REGISTER_A], -Registers[REGISTER_E], (BYTE)temp_word);
960 Registers[REGISTER_A] = (BYTE)temp_word;
961
962 break;
963
964 case 0x64: //Sub (AF)
965 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_F];
966 if ((Flags & FLAG_C) != 0) {
967 temp_word--;
968 }
969
970 if (temp_word >= 0x100) {
971 //Set carry flag
972 Flags = Flags | FLAG_C;
973 }
974 else {
975 //Clear carry flag
976 Flags = Flags & (0xFF - FLAG_C);
977 }
978 set_flag_n((BYTE)temp_word);
979 set_flag_z((BYTE)temp_word);
980 set_flag_v(Registers[REGISTER_A], -Registers[REGISTER_F], (BYTE)temp_word);
981 Registers[REGISTER_A] = (BYTE)temp_word;
982
983 break;
984
985 //***********************************************//
986 // END of SUB //
987 //***********************************************//
988
989 case 0x25: //CMP (AB)
990 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_B];
991 if ((Flags & FLAG_C) != 0) {
992 temp_word++;
993 }
994
995 if (temp_word >= 0x100) {
996 //Set (carry flag)
997 Flags = Flags | FLAG_C;
998 }
999 else {
1000 //Clear (carry flag)
1001 Flags = Flags & (0xFF - FLAG_C);
1002 }
1003 set_flag_n((BYTE)temp_word);
1004 set_flag_z((BYTE)temp_word);
1005 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_B], (BYTE)temp_word);
1006
1007 break;
1008
1009 case 0x35: //CMP (AC)
1010 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_C];
1011 if ((Flags & FLAG_C) != 0) {
1012 temp_word++;
1013 }
1014
1015 if (temp_word >= 0x100) {
1016 //Set (carry flag)
1017 Flags = Flags | FLAG_C;
1018 }
1019 else {
1020 //Clear (carry flag)
1021 Flags = Flags & (0xFF - FLAG_C);
1022 }
1023 set_flag_n((BYTE)temp_word);
1024 set_flag_z((BYTE)temp_word);
1025 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_C], (BYTE)temp_word);
1026
1027 break;
1028
1029 case 0x45: //CMP (AD)
1030 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_D];
1031 if ((Flags & FLAG_C) != 0) {
1032 temp_word++;
1033 }
1034
1035 if (temp_word >= 0x100) {
1036 //Set (carry flag)
1037 Flags = Flags | FLAG_C;
1038 }
1039 else {
1040 //Clear (carry flag)
1041 Flags = Flags & (0xFF - FLAG_C);
1042 }
1043 set_flag_n((BYTE)temp_word);
1044 set_flag_z((BYTE)temp_word);
1045 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_D], (BYTE)temp_word);
1046
1047 break;
1048
1049 case 0x55: //CMP (AE)
1050 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_E];
1051 if ((Flags & FLAG_C) != 0) {
1052 temp_word++;
1053 }
1054
1055 if (temp_word >= 0x100) {
1056 //Set (carry flag)
1057 Flags = Flags | FLAG_C;
1058 }
1059 else {
1060 //Clear (carry flag)
1061 Flags = Flags & (0xFF - FLAG_C);
1062 }
1063 set_flag_n((BYTE)temp_word);
1064 set_flag_z((BYTE)temp_word);
1065 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_E], (BYTE)temp_word);
1066
1067 break;
1068
1069 case 0x65: //CMP (AF)
1070 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_F];
1071 if ((Flags & FLAG_C) != 0) {
1072 temp_word++;
1073 }
1074
1075 if (temp_word >= 0x100) {
1076 //Set (carry flag)
1077 Flags = Flags | FLAG_C;
1078 }
1079 else {
1080 //Clear (carry flag)
1081 Flags = Flags & (0xFF - FLAG_C);
1082 }
1083 set_flag_n((BYTE)temp_word);
1084 set_flag_z((BYTE)temp_word);
1085 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_F], (BYTE)temp_word);
1086
1087 break;
1088
1089 //***********************************************//
1090 // END of CMP //
1091 //***********************************************//
1092
1093 case 0x0F: //CSA
1094 Registers[REGISTER_A] = Flags;
1095 break;
1096
1097 //***********************************************//
1098 // END of CSA //
1099 //***********************************************//
1100
1101 case 0x02: //STX (Absolute)
1102 HB = fetch();
1103 LB = fetch();
1104 address += (WORD)((WORD)HB << 8) + LB;
1105 if (address >= 0 && address < MEMORY_SIZE) {
1106 Memory[address] = Registers[REGISTER_X];
1107 }
1108 set_flag_n(Memory[address]);
1109 set_flag_z(Memory[address]);
1110 break;
1111
1112 case 0x12: //STX (Absolute Index X)
1113 address += Index_Registers[REGISTER_X];
1114 HB = fetch();
1115 LB = fetch();
1116 address += (WORD)((WORD)HB << 8) + LB;
1117 if (address >= 0 && address < MEMORY_SIZE) {
1118 Memory[address] = Registers[REGISTER_X];
1119 }
1120 set_flag_n(Memory[address]);
1121 set_flag_z(Memory[address]);
1122 break;
1123
1124 case 0x22: //STX (Absolute Index Y)
1125 address += Index_Registers[REGISTER_Y];
1126 HB = fetch();
1127 LB = fetch();
1128 address += (WORD)((WORD)HB << 8) + LB;
1129 if (address >= 0 && address < MEMORY_SIZE) {
1130 Memory[address] = Registers[REGISTER_X];
1131 }
1132 set_flag_n(Memory[address]);
1133 set_flag_z(Memory[address]);
1134 break;
1135
1136 case 0x32: //STX (Absolute Index XY)
1137 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1138 HB = fetch();
1139 LB = fetch();
1140 address += (WORD)((WORD)HB << 8) + LB;
1141 if (address >= 0 && address < MEMORY_SIZE) {
1142 Memory[address] = Registers[REGISTER_X];
1143 }
1144 set_flag_n(Memory[address]);
1145 set_flag_z(Memory[address]);
1146 break;
1147
1148 case 0x42: //STX (Indirect XY)
1149 HB = fetch();
1150 LB = fetch();
1151 address = (WORD)((WORD)HB << 8) + LB;
1152 HB = Memory[address];
1153 LB = Memory[address + 1];
1154 address = (WORD)((WORD)HB << 8) + LB;
1155 address += Index_Registers[REGISTER_X];
1156 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
1157 if (address >= 0 && address < MEMORY_SIZE) {
1158 Memory[address] = Registers[REGISTER_X];
1159 }
1160 set_flag_n(Memory[address]);
1161 set_flag_z(Memory[address]);
1162 break;
1163 //***********************************************//
1164 // END of STX //
1165 //***********************************************//
1166
1167
1168 case 0x2A: //Transfer A to A
1169 Registers[REGISTER_A] = Registers[REGISTER_A];
1170 break;
1171 case 0x3A: //Transfer A to B
1172 Registers[REGISTER_A] = Registers[REGISTER_B];
1173 break;
1174 case 0x4A: //Transfer A to C
1175 Registers[REGISTER_A] = Registers[REGISTER_C];
1176 break;
1177 case 0x5A: //Transfer A to D
1178 Registers[REGISTER_A] = Registers[REGISTER_D];
1179 break;
1180 case 0x6A: //Transfer A to E
1181 Registers[REGISTER_A] = Registers[REGISTER_E];
1182 break;
1183 case 0x7A: //Transfer A to F
1184 Registers[REGISTER_A] = Registers[REGISTER_F];
1185 break;
1186 case 0x2B: //Transfer B to A
1187 Registers[REGISTER_B] = Registers[REGISTER_A];
1188 break;
1189 case 0x3B: //Transfer B to B
1190 Registers[REGISTER_B] = Registers[REGISTER_B];
1191 break;
1192 case 0x4B: //Transfer B to C
1193 Registers[REGISTER_B] = Registers[REGISTER_C];
1194 break;
1195 case 0x5B: //Transfer B to D
1196 Registers[REGISTER_B] = Registers[REGISTER_D];
1197 break;
1198 case 0x6B: //Transfer B to E
1199 Registers[REGISTER_B] = Registers[REGISTER_E];
1200 break;
1201 case 0x7B: //Transfer B to F
1202 Registers[REGISTER_B] = Registers[REGISTER_F];
1203 break;
1204 case 0x2C: //Transfer C to A
1205 Registers[REGISTER_C] = Registers[REGISTER_A];
1206 break;
1207 case 0x3C: //Transfer C to B
1208 Registers[REGISTER_C] = Registers[REGISTER_B];
1209 break;
1210 case 0x4C: //Transfer C to C
1211 Registers[REGISTER_C] = Registers[REGISTER_C];
1212 break;
1213 case 0x5C: //Transfer C to D
1214 Registers[REGISTER_C] = Registers[REGISTER_D];
1215 break;
1216 case 0x6C: //Transfer C to E
1217 Registers[REGISTER_C] = Registers[REGISTER_E];
1218 break;
1219 case 0x7C: //Transfer C to F
1220 Registers[REGISTER_C] = Registers[REGISTER_E];
1221 break;
1222 case 0x2D: //Transfer D to A
1223 Registers[REGISTER_D] = Registers[REGISTER_A];
1224 break;
1225 case 0x3D: //Transfer D to B
1226 Registers[REGISTER_D] = Registers[REGISTER_B];
1227 break;
1228 case 0x4D: //Transfer D to C
1229 Registers[REGISTER_D] = Registers[REGISTER_C];
1230 break;
1231 case 0x5D: //Transfer D to D
1232 Registers[REGISTER_D] = Registers[REGISTER_D];
1233 break;
1234 case 0x6D: //Transfer D to E
1235 Registers[REGISTER_D] = Registers[REGISTER_E];
1236 break;
1237 case 0x7D: //Transfer D to F
1238 Registers[REGISTER_D] = Registers[REGISTER_F];
1239 break;
1240 case 0x2E: //Transfer E to A
1241 Registers[REGISTER_E] = Registers[REGISTER_A];
1242 break;
1243 case 0x3E: //Transfer E to B
1244 Registers[REGISTER_E] = Registers[REGISTER_B];
1245 break;
1246 case 0x4E: //Transfer E to C
1247 Registers[REGISTER_E] = Registers[REGISTER_C];
1248 break;
1249 case 0x5E: //Transfer E to D
1250 Registers[REGISTER_E] = Registers[REGISTER_D];
1251 break;
1252 case 0x6E: //Transfer E to E
1253 Registers[REGISTER_E] = Registers[REGISTER_E];
1254 break;
1255 case 0x7E: //Transfer E to F
1256 Registers[REGISTER_E] = Registers[REGISTER_F];
1257 break;
1258 case 0x2F: //Transfer F to A
1259 Registers[REGISTER_F] = Registers[REGISTER_A];
1260 break;
1261 case 0x3F: //Transfer F to B
1262 Registers[REGISTER_F] = Registers[REGISTER_B];
1263 break;
1264 case 0x4F: //Transfer F to C
1265 Registers[REGISTER_F] = Registers[REGISTER_C];
1266 break;
1267 case 0x5F: //Transfer F to D
1268 Registers[REGISTER_F] = Registers[REGISTER_D];
1269 break;
1270 case 0x6F: //Transfer F to E
1271 Registers[REGISTER_F] = Registers[REGISTER_E];
1272 break;
1273 case 0x7F: //Transfer F to E
1274 Registers[REGISTER_F] = Registers[REGISTER_F];
1275 break;
1276 //***********************************************/
1277 // END of LD //
1278 //***********************************************//
1279
1280 case 0x74:
1281 halt = true;
1282 break;
1283
1284 //***********************************************//
1285 // END of HLT //
1286 //***********************************************//
1287
1288 case 0x0C:
1289 Registers[REGISTER_A] = Registers[REGISTER_Y];
1290 set_flag_n(Registers[REGISTER_A]);
1291 break;
1292
1293 //***********************************************//
1294 // END of MAY //
1295 //***********************************************//
1296
1297 case 0x0D:
1298 Registers[REGISTER_Y] = Registers[REGISTER_A];
1299 set_flag_n(Registers[REGISTER_Y]);
1300 set_flag_z(Registers[REGISTER_Y]);
1301 break;
1302
1303
1304 //***********************************************//
1305 // END of MYA //
1306 //***********************************************//
1307
1308
1309 case 0x0E:
1310 Flags = Registers[REGISTER_A];
1311 break;
1312
1313 //***********************************************//
1314 // END of MAS //
1315 //***********************************************//
1316
1317 case 0x19:
1318 Flags = Flags | FLAG_C;
1319 break;
1320
1321 //***********************************************//
1322 // END of SEC //
1323 //***********************************************//
1324
1325 case 0x18:
1326 Flags = Flags & (0xFF - FLAG_C);
1327 break;
1328
1329 //***********************************************//
1330 // END of CLC //
1331 //***********************************************//
1332
1333
1334 case 0x1B:
1335 Flags = Flags | FLAG_I;
1336 break;
1337
1338 //***********************************************//
1339 // END of STI //
1340 //***********************************************//
1341
1342
1343 case 0x1A:
1344 Flags = Flags & (0XFF - FLAG_I);
1345 break;
1346
1347 //***********************************************//
1348 // END of CLI //
1349 //***********************************************//
1350
1351 case 0x1C:
1352 Flags = Flags | FLAG_V;
1353 break;
1354
1355 //***********************************************//
1356 // END of STV //
1357 //***********************************************//
1358
1359 case 0x1D:
1360 Flags = Flags & (0XFF - FLAG_V);
1361 break;
1362
1363 //***********************************************//
1364 // END of CLV //
1365 //***********************************************//
1366
1367 case 0x9B:
1368 data = fetch();
1369 Registers[REGISTER_A] = data;
1370 set_flag_n(Registers[REGISTER_A]);
1371 set_flag_z(Registers[REGISTER_A]);
1372 data = fetch();
1373 Registers[REGISTER_B] = data;
1374 set_flag_n(Registers[REGISTER_B]);
1375 set_flag_z(Registers[REGISTER_B]);
1376 break;
1377
1378
1379 //***********************************************//
1380 // END of LX //
1381 //***********************************************//
1382
1383 case 0x9E: //PUSH
1384 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1385 Memory[StackPointer] = Registers[REGISTER_A];
1386 StackPointer--;
1387 }
1388 break;
1389
1390 //***********************************************//
1391 // END of PUSH (9E) //
1392 //***********************************************//
1393 case 0xAE: //PUSH
1394 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1395 Memory[StackPointer] = Flags;
1396
1397 StackPointer--;
1398 }
1399 break;
1400 //***********************************************//
1401 // END of PUSH (AE) //
1402 //***********************************************//
1403
1404 case 0xBE: //PUSH
1405 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1406 Memory[StackPointer] = Registers[REGISTER_B];
1407
1408 StackPointer--;
1409 }
1410 break;
1411 //***********************************************//
1412 // END of PUSH (BE) //
1413 //***********************************************//
1414
1415 case 0xCE: //PUSH
1416 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1417 Memory[StackPointer] = Registers[REGISTER_C];
1418
1419 StackPointer--;
1420 }
1421 break;
1422 //***********************************************//
1423 // END of PUSH (CE) //
1424 //***********************************************//
1425 case 0xDE: //PUSH
1426 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1427 Memory[StackPointer] = Registers[REGISTER_D];
1428
1429 StackPointer--;
1430 }
1431 break;
1432 //***********************************************//
1433 // END of PUSH (DE) //
1434 //***********************************************//
1435
1436 case 0xEE: //PUSH
1437 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1438 Memory[StackPointer] = Registers[REGISTER_E];
1439
1440 StackPointer--;
1441 }
1442 break;
1443 //***********************************************//
1444 // END of PUSH (EE) //
1445 //***********************************************//
1446
1447 case 0xFE: //PUSH
1448 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1449 Memory[StackPointer] = Registers[REGISTER_F];
1450
1451 StackPointer--;
1452 }
1453 break;
1454 //***********************************************//
1455 // END of PUSH (FE) //
1456 //***********************************************//
1457
1458 case 0x9F: //POP
1459 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1460 StackPointer++;
1461 Registers[REGISTER_A] = Memory[StackPointer];
1462 }
1463 break;
1464
1465 //***********************************************//
1466 // END of POP (9F) //
1467 //***********************************************//
1468
1469 case 0xAF: //POP
1470 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1471 StackPointer++;
1472 Flags= Memory[StackPointer];
1473 }
1474 break;
1475
1476 //***********************************************//
1477 // END of POP (AF) //
1478 //***********************************************//
1479
1480 case 0xBF: //POP
1481 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1482 StackPointer++;
1483 Registers[REGISTER_B] = Memory[StackPointer];
1484 }
1485 break;
1486
1487 //***********************************************//
1488 // END of POP (BF) //
1489 //***********************************************//
1490
1491 case 0xCF: //POP
1492 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1493 StackPointer++;
1494 Registers[REGISTER_C] = Memory[StackPointer];
1495 }
1496 break;
1497
1498 //***********************************************//
1499 // END of POP (CF) //
1500 //***********************************************//
1501
1502 case 0xDF: //POP
1503 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1504 StackPointer++;
1505 Registers[REGISTER_D] = Memory[StackPointer];
1506 }
1507 break;
1508
1509 //***********************************************//
1510 // END of POP (DF) //
1511 //***********************************************//
1512
1513 case 0xEF: //POP
1514 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1515 StackPointer++;
1516 Registers[REGISTER_E] = Memory[StackPointer];
1517 }
1518 break;
1519
1520 //***********************************************//
1521 // END of POP (EF) //
1522 //***********************************************//
1523
1524 case 0xFF: //POP
1525 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1526 StackPointer++;
1527 Registers[REGISTER_F] = Memory[StackPointer];
1528 }
1529 break;
1530
1531 //***********************************************//
1532 // END of POP (FF) //
1533 //***********************************************//
1534 case 0xEA: //JMP (ABS)
1535 HB = fetch();
1536 LB = fetch();
1537 address = ((WORD)HB << 8) + (WORD)LB;
1538 ProgramCounter = address;
1539 break;
1540
1541 //***********************************************//
1542 // END of JMP (EA/ABS) //
1543 //***********************************************//
1544
1545 case 0xE9: //JSR (ABS)
1546 HB = fetch();
1547 LB = fetch();
1548 address = ((WORD)HB << 8) + (WORD)LB;
1549 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1550 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1551 StackPointer--;
1552 Memory[StackPointer] = (BYTE)((ProgramCounter >>8)& 0xFF);
1553 StackPointer--;
1554 }
1555 ProgramCounter = address;
1556 break;
1557
1558 //***********************************************//
1559 // END of JSR (ABS) //
1560 //***********************************************//
1561 case 0xDB: //RTN
1562 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 2)) {
1563 StackPointer++;
1564 HB = Memory[StackPointer];
1565 StackPointer++;
1566 LB = Memory[StackPointer];
1567 ProgramCounter = ((WORD)HB << 8) + (WORD)LB;
1568 }
1569 break;
1570
1571 //***********************************************//
1572 // END of RTN //
1573 //***********************************************//
1574
1575 case 0xF0: //BRA -128 +127
1576 LB = fetch();
1577 offset = (WORD)LB;
1578 if ((offset & 0x80) != 0) {
1579 offset = offset + 0xFF00;
1580 }address = ProgramCounter + offset;
1581 ProgramCounter = address;
1582 break;
1583
1584 //***********************************************//
1585 // END of BRA //
1586 //***********************************************//
1587
1588 case 0xD2://INCA
1589 ++Registers[REGISTER_A];
1590 set_flag_n(Registers[REGISTER_A]);
1591 set_flag_z(Registers[REGISTER_A]);
1592 break;
1593
1594 //***********************************************//
1595 // END of INCA //
1596 //***********************************************//
1597
1598 case 0xE2: //INX
1599 ++Index_Registers[REGISTER_A];
1600 set_flag_z(Index_Registers[REGISTER_A]);
1601 break;
1602
1603 //***********************************************//
1604 // END of INX //
1605 //***********************************************//
1606
1607 case 0x27: //AND A-B
1608 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_B];
1609
1610 Flags = Flags & (0xFF - FLAG_V);
1611
1612 set_flag_n((BYTE)temp_word);
1613 set_flag_z((BYTE)temp_word);
1614 Registers[REGISTER_A] = (BYTE)temp_word;
1615 break;
1616
1617 case 0x37: //AND A-C
1618 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_C];
1619
1620 Flags = Flags & (0xFF - FLAG_V);
1621
1622 set_flag_n((BYTE)temp_word);
1623 set_flag_z((BYTE)temp_word);
1624 Registers[REGISTER_A] = (BYTE)temp_word;
1625 break;
1626
1627 case 0x47: //AND A-D
1628 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_D];
1629
1630 Flags = Flags & (0xFF - FLAG_V);
1631
1632 set_flag_n((BYTE)temp_word);
1633 set_flag_z((BYTE)temp_word);
1634 Registers[REGISTER_A] = (BYTE)temp_word;
1635 break;
1636
1637 case 0x57: //AND A-E
1638 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_E];
1639
1640 Flags = Flags & (0xFF - FLAG_V);
1641
1642 set_flag_n((BYTE)temp_word);
1643 set_flag_z((BYTE)temp_word);
1644 Registers[REGISTER_A] = (BYTE)temp_word;
1645 break;
1646
1647 case 0x67: //AND A-F
1648 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_F];
1649
1650 Flags = Flags & (0xFF - FLAG_V);
1651
1652 set_flag_n((BYTE)temp_word);
1653 set_flag_z((BYTE)temp_word);
1654 Registers[REGISTER_A] = (BYTE)temp_word;
1655 break;
1656 //***********************************************//
1657 // END of AND //
1658 //***********************************************//
1659
1660 case 0x29: //BT
1661 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_B];
1662 Flags = Flags & (0xFF - FLAG_V);
1663 set_flag_n((BYTE)temp_word);
1664 set_flag_z((BYTE)temp_word);
1665 break;
1666 //***********************************************//
1667 // END of BT (a-b) //
1668 //***********************************************//
1669 case 0x39: //BT
1670 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_C];
1671 Flags = Flags & (0xFF - FLAG_V);
1672 set_flag_n((BYTE)temp_word);
1673 set_flag_z((BYTE)temp_word);
1674 break;
1675 //***********************************************//
1676 // END of BT (a-c) //
1677 //***********************************************//
1678 case 0x49: //BT
1679 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_D];
1680 Flags = Flags & (0xFF - FLAG_V);
1681 set_flag_n((BYTE)temp_word);
1682 set_flag_z((BYTE)temp_word);
1683 break;
1684 //***********************************************//
1685 // END of BT (a-d) //
1686 //***********************************************//
1687 case 0x59: //BT
1688 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_E];
1689 Flags = Flags & (0xFF - FLAG_V);
1690 set_flag_n((BYTE)temp_word);
1691 set_flag_z((BYTE)temp_word);
1692 break;
1693 //***********************************************//
1694 // END of BT (a-e) //
1695 //***********************************************//
1696 case 0x69: //BT
1697 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_F];
1698 Flags = Flags & (0xFF - FLAG_V);
1699 set_flag_n((BYTE)temp_word);
1700 set_flag_z((BYTE)temp_word);
1701 break;
1702 //***********************************************//
1703 // END of BT (a-F) //
1704 //***********************************************//
1705
1706 case 0xF1: //BCC
1707 HB = fetch();
1708 LB = fetch();
1709 address += (WORD)((WORD)HB << 8)+LB;
1710 if (address >=0 && address<MEMORY_SIZE){
1711 if ((Flags &FLAG_C) == 0)
1712 {
1713 Memory[StackPointer] = ProgramCounter;
1714 StackPointer--;
1715 ProgramCounter = address;
1716 }
1717 }
1718 ProgramCounter = address;
1719 break;
1720
1721 //***********************************************//
1722 // END of BCC //
1723 //***********************************************//
1724
1725 case 0xF2: //BCS
1726 HB = fetch();
1727 LB = fetch();
1728 address += (WORD)((WORD)HB << 8) + LB;
1729 if (address >= 0 && address<MEMORY_SIZE) {
1730 if ((Flags &FLAG_C) == 1)
1731 {
1732 Memory[StackPointer] = ProgramCounter;
1733 StackPointer--;
1734 ProgramCounter = address;
1735 }
1736 }
1737 ProgramCounter = address;
1738 break;
1739
1740 //***********************************************//
1741 // END of BCS //
1742 //***********************************************//
1743 case 0xF3: //BNE RE1
1744 HB = fetch();
1745 LB = fetch();
1746 address += (WORD)((WORD)HB << 8) + LB;
1747 if (address >= 0 && address<MEMORY_SIZE) {
1748 if ((Flags &FLAG_Z) == 0)
1749 {
1750 Memory[StackPointer] = ProgramCounter;
1751 StackPointer--;
1752 ProgramCounter = address;
1753 }
1754 }
1755 ProgramCounter = address;
1756 break;
1757
1758 //***********************************************//
1759 // END of BNE RN1 //
1760 //***********************************************//
1761
1762 case 0xF4: //BEQ
1763 HB = fetch();
1764 LB = fetch();
1765 address += (WORD)((WORD)HB << 8) + LB;
1766 if (address >= 0 && address<MEMORY_SIZE) {
1767 if ((Flags &FLAG_Z) == 1)
1768 {
1769 Memory[StackPointer] = ProgramCounter;
1770 StackPointer--;
1771 ProgramCounter = address;
1772 }
1773 }
1774 ProgramCounter = address;
1775 break;
1776
1777 //***********************************************//
1778 // END of BEQ //
1779 //***********************************************//
1780
1781 case 0xF7: //BMI
1782 HB = fetch();
1783 LB = fetch();
1784 address += (WORD)((WORD)HB << 8) + LB;
1785 if (address >= 0 && address<MEMORY_SIZE) {
1786 if ((Flags &FLAG_N) == 0)
1787 {
1788 Memory[StackPointer] = ProgramCounter;
1789 StackPointer--;
1790 ProgramCounter = address;
1791 }
1792 }
1793 ProgramCounter = address;
1794 break;
1795
1796 //***********************************************//
1797 // END of BMI //
1798 //***********************************************//
1799 case 0xF8: //BPL
1800 HB = fetch();
1801 LB = fetch();
1802 address += (WORD)((WORD)HB << 8) + LB;
1803 if (address >= 0 && address<MEMORY_SIZE) {
1804 if ((Flags &FLAG_N) == 0)
1805 {
1806 Memory[StackPointer] = ProgramCounter;
1807 StackPointer--;
1808 ProgramCounter = address;
1809 }
1810 }
1811 ProgramCounter = address;
1812 break;
1813
1814 //***********************************************//
1815 // END of BPL //
1816 //***********************************************//
1817
1818 case 0xF9:
1819 HB = fetch();
1820 LB = fetch();
1821 address += (WORD)((WORD)HB << 8) + LB;
1822 if (address >= 0 && address<MEMORY_SIZE) {
1823 if ((Flags &FLAG_N) <= 0)
1824 {
1825 Memory[StackPointer] = ProgramCounter;
1826 StackPointer--;
1827 ProgramCounter = address;
1828 }
1829 }
1830 ProgramCounter = address;
1831 break;
1832
1833 //END OF BGE
1834
1835 case 0xFA: //BLE
1836 HB = fetch();
1837 LB = fetch();
1838 address += (WORD)((WORD)HB << 8) + LB;
1839 if (address >= 0 && address<MEMORY_SIZE) {
1840 if ((Flags &FLAG_N) >= 0)
1841 {
1842 Memory[StackPointer] = ProgramCounter;
1843 StackPointer--;
1844 ProgramCounter = address;
1845 }
1846 }
1847 ProgramCounter = address;
1848 break;
1849
1850 //***********************************************//
1851 // END of BLE //
1852 //***********************************************//
1853
1854 case 0xFB: //BGT
1855 HB = fetch();
1856 LB = fetch();
1857 address += (WORD)((WORD)HB << 8) + LB;
1858 if (address >= 0 && address<MEMORY_SIZE) {
1859 if ((Flags &FLAG_N) <= 0)
1860 {
1861 Memory[StackPointer] = ProgramCounter;
1862 StackPointer--;
1863 ProgramCounter = address;
1864 }
1865 }
1866 ProgramCounter = address;
1867 break;
1868
1869 //***********************************************//
1870 // END of BGT //
1871 //***********************************************//
1872
1873 case 0xFC: //BLT
1874 HB = fetch();
1875 LB = fetch();
1876 address += (WORD)((WORD)HB << 8) + LB;
1877 if (address >= 0 && address<MEMORY_SIZE) {
1878 if ((Flags &FLAG_N) > 0)
1879 {
1880 Memory[StackPointer] = ProgramCounter;
1881 StackPointer--;
1882 ProgramCounter = address;
1883 }
1884 }
1885 ProgramCounter = address;
1886 break;
1887
1888 //***********************************************//
1889 // END of BLT //
1890 //***********************************************//
1891
1892 case 0xD3://DECA
1893 --Registers[REGISTER_A];
1894 set_flag_n(Registers[REGISTER_A]);
1895 set_flag_z(Registers[REGISTER_A]);
1896 break;
1897
1898 //***********************************************//
1899 // END of DECA //
1900 //***********************************************//
1901
1902
1903 case 0x92: //INC
1904 HB = fetch();
1905 LB = fetch();
1906 address += (WORD)((WORD)HB << 8) + LB;
1907 if (address >= 0 && address < MEMORY_SIZE) {
1908 Memory[address]++;
1909 }
1910 set_flag_n(Memory[address]);
1911 set_flag_z(Memory[address]);
1912
1913
1914 case 0xA2: //INC
1915 address += Index_Registers[REGISTER_X];
1916 HB = fetch();
1917 LB = fetch();
1918 address += (WORD)((WORD)HB << 8) + LB;
1919 if (address >= 0 && address < MEMORY_SIZE) {
1920 Memory[address]++;
1921 }
1922 set_flag_n(Memory[address]);
1923 set_flag_z(Memory[address]);
1924
1925
1926 case 0xB2: //INC
1927 address += Index_Registers[REGISTER_Y];
1928 HB = fetch();
1929 LB = fetch();
1930 address += (WORD)((WORD)HB << 8) + LB;
1931 if (address >= 0 && address < MEMORY_SIZE) {
1932 Memory[address]++;
1933 }
1934 set_flag_n(Memory[address]);
1935 set_flag_z(Memory[address]);
1936
1937
1938 case 0xC2: //INC
1939 address += (WORD)((WORD)Index_Registers[REGISTER_Y]<<8)+Index_Registers[REGISTER_X];
1940 HB = fetch();
1941 LB = fetch();
1942 address += (WORD)((WORD)HB << 8) + LB;
1943 if (address >= 0 && address < MEMORY_SIZE) {
1944 Memory[address]++;
1945 }
1946 set_flag_n(Memory[address]);
1947 set_flag_z(Memory[address]);
1948 //***********************************************//
1949 // END of INC abs,xy //
1950 //***********************************************//
1951
1952 case 0x93: //DEC
1953 HB = fetch();
1954 LB = fetch();
1955 address += (WORD)((WORD)HB << 8) + LB;
1956 if (address >= 0 && address < MEMORY_SIZE) {
1957 Memory[address]--;
1958 }
1959 set_flag_n(Memory[address]);
1960 set_flag_z(Memory[address]);
1961 //***********************************************//
1962 // END of DEC abs,x //
1963 //***********************************************//
1964
1965 case 0xA3: //INC
1966 address += Index_Registers[REGISTER_X];
1967 HB = fetch();
1968 LB = fetch();
1969 address += (WORD)((WORD)HB << 8) + LB;
1970 if (address >= 0 && address < MEMORY_SIZE) {
1971 Memory[address]--;
1972 }
1973 set_flag_n(Memory[address]);
1974 set_flag_z(Memory[address]);
1975 //***********************************************//
1976 // END of DEC abs,Y //
1977 //***********************************************//
1978
1979 case 0xB3: // INC
1980 address += Index_Registers[REGISTER_Y];
1981 HB = fetch();
1982 LB = fetch();
1983 address += (WORD)((WORD)HB << 8) + LB;
1984 if (address >= 0 && address < MEMORY_SIZE) {
1985 Memory[address]--;
1986 }
1987 set_flag_n(Memory[address]);
1988 set_flag_z(Memory[address]);
1989 //***********************************************//
1990 // END of DEC abs,Y //
1991 //***********************************************//
1992
1993
1994 case 0xC3: //INC
1995 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1996 HB = fetch();
1997 LB = fetch();
1998 address += (WORD)((WORD)HB << 8) + LB;
1999 if (address >= 0 && address < MEMORY_SIZE) {
2000 Memory[address]--;
2001 }
2002 set_flag_n(Memory[address]);
2003 set_flag_z(Memory[address]);
2004 //***********************************************//
2005 // END of DEC abs,xy //
2006 //***********************************************//
2007
2008 case 0xE1: //DEX
2009 Index_Registers[REGISTER_X]--;
2010 set_flag_z(Index_Registers[REGISTER_X]);
2011 break;
2012
2013 case 0xE3: //DEY
2014 Index_Registers[REGISTER_Y]--;
2015 set_flag_z(Index_Registers[REGISTER_Y]);
2016 break;
2017
2018 case 0xE4: //incy
2019 Index_Registers[REGISTER_Y]++;
2020 set_flag_z(Index_Registers[REGISTER_Y]);
2021 break;
2022 }
2023}
2024
2025void Group_2_Move(BYTE opcode)
2026{
2027 BYTE source = opcode >> 4;
2028 BYTE destination = opcode & 0x0F;
2029 int destReg = 0;
2030 int sourceReg = 0;
2031
2032
2033 //MV for Destination
2034 switch (destination)
2035 {
2036 case 0x0A:
2037 destReg = REGISTER_A;
2038
2039 break;
2040
2041 case 0x0B:
2042 destReg = REGISTER_B;
2043
2044 break;
2045
2046 case 0x0C:
2047 destReg = REGISTER_C;
2048
2049 break;
2050
2051 case 0x0D:
2052 destReg = REGISTER_D;
2053
2054 break;
2055
2056 case 0x0E:
2057 destReg = REGISTER_E;
2058
2059 break;
2060
2061 case 0x0F:
2062 destReg = REGISTER_F;
2063
2064 break;
2065 }
2066
2067 //MV Source
2068 switch (source)
2069 {
2070 case 0x02:
2071 sourceReg = REGISTER_A;
2072 break;
2073
2074 case 0x03:
2075 sourceReg = REGISTER_B;
2076 break;
2077
2078 case 0x04:
2079 sourceReg = REGISTER_C;
2080 break;
2081
2082 case 0x05:
2083 sourceReg = REGISTER_D;
2084 break;
2085
2086 case 0x06:
2087 sourceReg = REGISTER_E;
2088 break;
2089
2090 case 0x07:
2091 sourceReg = REGISTER_F;
2092 break;
2093
2094 }
2095 Registers[destReg] = Registers[sourceReg];
2096}
2097
2098
2099void execute(BYTE opcode)
2100{
2101 if (((opcode >= 0x2A) && (opcode <= 0x2F))
2102 || ((opcode >= 0x3A) && (opcode <= 0x3F))
2103 || ((opcode >= 0x4A) && (opcode <= 0x4F))
2104 || ((opcode >= 0x5A) && (opcode <= 0x5F))
2105 || ((opcode >= 0x6A) && (opcode <= 0x6F))
2106 || ((opcode >= 0x7A) && (opcode <= 0x7F)))
2107 {
2108 Group_2_Move(opcode);
2109 }
2110 else
2111 {
2112 Group_1(opcode);
2113 }
2114}
2115
2116void emulate()
2117{
2118 BYTE opcode;
2119 int sanity;
2120
2121 sanity = 0;
2122 ProgramCounter = 0;
2123 halt = false;
2124 memory_in_range = true;
2125
2126 printf(" A B C D E F X Y SP\n");
2127
2128 while ((!halt) && (memory_in_range)) {
2129 sanity++;
2130 if (sanity > 500) halt = true;
2131 printf("%04X ", ProgramCounter); // Print current address
2132 opcode = fetch();
2133 execute(opcode);
2134
2135 printf("%s ", opcode_mneumonics[opcode]); // Print current opcode
2136
2137 printf("%02X ", Registers[REGISTER_A]);
2138 printf("%02X ", Registers[REGISTER_B]);
2139 printf("%02X ", Registers[REGISTER_C]);
2140 printf("%02X ", Registers[REGISTER_D]);
2141 printf("%02X ", Registers[REGISTER_E]);
2142 printf("%02X ", Registers[REGISTER_F]);
2143 printf("%02X ", Index_Registers[REGISTER_X]);
2144 printf("%02X ", Index_Registers[REGISTER_Y]);
2145 printf("%04X ", StackPointer); // Print Stack Pointer
2146
2147 if ((Flags & FLAG_I) == FLAG_I)
2148 {
2149 printf("I=1 ");
2150 }
2151 else
2152 {
2153 printf("I=0 ");
2154 }
2155 if ((Flags & FLAG_V) == FLAG_V)
2156 {
2157 printf("V=1 ");
2158 }
2159 else
2160 {
2161 printf("V=0 ");
2162 }
2163 if ((Flags & FLAG_N) == FLAG_N)
2164 {
2165 printf("N=1 ");
2166 }
2167 else
2168 {
2169 printf("N=0 ");
2170 }
2171 if ((Flags & FLAG_Z) == FLAG_Z)
2172 {
2173 printf("Z=1 ");
2174 }
2175 else
2176 {
2177 printf("Z=0 ");
2178 }
2179 if ((Flags & FLAG_C) == FLAG_C)
2180 {
2181 printf("C=1 ");
2182 }
2183 else
2184 {
2185 printf("C=0 ");
2186 }
2187
2188 printf("\n"); // New line
2189 }
2190
2191 printf("\n"); // New line
2192}
2193
2194
2195////////////////////////////////////////////////////////////////////////////////
2196// Simulator/Emulator (End) //
2197////////////////////////////////////////////////////////////////////////////////
2198
2199
2200void initialise_filenames() {
2201 int i;
2202
2203 for (i = 0; i<MAX_FILENAME_SIZE; i++) {
2204 hex_file[i] = '\0';
2205 trc_file[i] = '\0';
2206 }
2207}
2208
2209
2210
2211
2212int find_dot_position(char *filename) {
2213 int dot_position;
2214 int i;
2215 char chr;
2216
2217 dot_position = 0;
2218 i = 0;
2219 chr = filename[i];
2220
2221 while (chr != '\0') {
2222 if (chr == '.') {
2223 dot_position = i;
2224 }
2225 i++;
2226 chr = filename[i];
2227 }
2228
2229 return (dot_position);
2230}
2231
2232
2233int find_end_position(char *filename) {
2234 int end_position;
2235 int i;
2236 char chr;
2237
2238 end_position = 0;
2239 i = 0;
2240 chr = filename[i];
2241
2242 while (chr != '\0') {
2243 end_position = i;
2244 i++;
2245 chr = filename[i];
2246 }
2247
2248 return (end_position);
2249}
2250
2251
2252bool file_exists(char *filename) {
2253 bool exists;
2254 FILE *ifp;
2255
2256 exists = false;
2257
2258 if ((ifp = fopen(filename, "r")) != NULL) {
2259 exists = true;
2260
2261 fclose(ifp);
2262 }
2263
2264 return (exists);
2265}
2266
2267
2268
2269void create_file(char *filename) {
2270 FILE *ofp;
2271
2272 if ((ofp = fopen(filename, "w")) != NULL) {
2273 fclose(ofp);
2274 }
2275}
2276
2277
2278
2279bool getline(FILE *fp, char *buffer) {
2280 bool rc;
2281 bool collect;
2282 char c;
2283 int i;
2284
2285 rc = false;
2286 collect = true;
2287
2288 i = 0;
2289 while (collect) {
2290 c = getc(fp);
2291
2292 switch (c) {
2293 case EOF:
2294 if (i > 0) {
2295 rc = true;
2296 }
2297 collect = false;
2298 break;
2299
2300 case '\n':
2301 if (i > 0) {
2302 rc = true;
2303 collect = false;
2304 buffer[i] = '\0';
2305 }
2306 break;
2307
2308 default:
2309 buffer[i] = c;
2310 i++;
2311 break;
2312 }
2313 }
2314
2315 return (rc);
2316}
2317
2318
2319
2320
2321
2322
2323void load_and_run(int args, _TCHAR** argv) {
2324 char chr;
2325 int ln;
2326 int dot_position;
2327 int end_position;
2328 long i;
2329 FILE *ifp;
2330 long address;
2331 long load_at;
2332 int code;
2333
2334 // Prompt for the .hex file
2335
2336 printf("\n");
2337 printf("Enter the hex filename (.hex): ");
2338
2339 if (args == 2) {
2340 ln = 0;
2341 chr = argv[1][ln];
2342 while (chr != '\0')
2343 {
2344 if (ln < MAX_FILENAME_SIZE)
2345 {
2346 hex_file[ln] = chr;
2347 trc_file[ln] = chr;
2348 ln++;
2349 }
2350 chr = argv[1][ln];
2351 }
2352 }
2353 else {
2354 ln = 0;
2355 chr = '\0';
2356 while (chr != '\n') {
2357 chr = getchar();
2358
2359 switch (chr) {
2360 case '\n':
2361 break;
2362 default:
2363 if (ln < MAX_FILENAME_SIZE) {
2364 hex_file[ln] = chr;
2365 trc_file[ln] = chr;
2366 ln++;
2367 }
2368 break;
2369 }
2370 }
2371
2372 }
2373 // Tidy up the file names
2374
2375 dot_position = find_dot_position(hex_file);
2376 if (dot_position == 0) {
2377 end_position = find_end_position(hex_file);
2378
2379 hex_file[end_position + 1] = '.';
2380 hex_file[end_position + 2] = 'h';
2381 hex_file[end_position + 3] = 'e';
2382 hex_file[end_position + 4] = 'x';
2383 hex_file[end_position + 5] = '\0';
2384 }
2385 else {
2386 hex_file[dot_position + 0] = '.';
2387 hex_file[dot_position + 1] = 'h';
2388 hex_file[dot_position + 2] = 'e';
2389 hex_file[dot_position + 3] = 'x';
2390 hex_file[dot_position + 4] = '\0';
2391 }
2392
2393 dot_position = find_dot_position(trc_file);
2394 if (dot_position == 0) {
2395 end_position = find_end_position(trc_file);
2396
2397 trc_file[end_position + 1] = '.';
2398 trc_file[end_position + 2] = 't';
2399 trc_file[end_position + 3] = 'r';
2400 trc_file[end_position + 4] = 'c';
2401 trc_file[end_position + 5] = '\0';
2402 }
2403 else {
2404 trc_file[dot_position + 0] = '.';
2405 trc_file[dot_position + 1] = 't';
2406 trc_file[dot_position + 2] = 'r';
2407 trc_file[dot_position + 3] = 'c';
2408 trc_file[dot_position + 4] = '\0';
2409 }
2410
2411 if (file_exists(hex_file)) {
2412 // Clear Registers and Memory
2413
2414 Registers[REGISTER_A] = 0;
2415 Registers[REGISTER_B] = 0;
2416 Registers[REGISTER_C] = 0;
2417 Registers[REGISTER_D] = 0;
2418 Registers[REGISTER_E] = 0;
2419 Registers[REGISTER_F] = 0;
2420 Index_Registers[REGISTER_X] = 0;
2421 Index_Registers[REGISTER_Y] = 0;
2422 Flags = 0;
2423 ProgramCounter = 0;
2424 StackPointer = 0;
2425
2426 for (i = 0; i<MEMORY_SIZE; i++) {
2427 Memory[i] = 0x00;
2428 }
2429
2430 // Load hex file
2431
2432 if ((ifp = fopen(hex_file, "r")) != NULL) {
2433 printf("Loading file...\n\n");
2434
2435 load_at = 0;
2436
2437 while (getline(ifp, InputBuffer)) {
2438 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
2439 load_at = address;
2440 }
2441 else if (sscanf(InputBuffer, "%x", &code) == 1) {
2442 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
2443 Memory[load_at] = (BYTE)code;
2444 }
2445 load_at++;
2446 }
2447 else {
2448 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
2449 }
2450 }
2451
2452 fclose(ifp);
2453 }
2454
2455 // Emulate
2456
2457 emulate();
2458 }
2459 else {
2460 printf("\n");
2461 printf("ERROR> Input file %s does not exist!\n", hex_file);
2462 printf("\n");
2463 }
2464}
2465
2466void building(int args, _TCHAR** argv) {
2467 char buffer[1024];
2468 load_and_run(args, argv);
2469 sprintf(buffer, "0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X",
2470 Memory[TEST_ADDRESS_1],
2471 Memory[TEST_ADDRESS_2],
2472 Memory[TEST_ADDRESS_3],
2473 Memory[TEST_ADDRESS_4],
2474 Memory[TEST_ADDRESS_5],
2475 Memory[TEST_ADDRESS_6],
2476 Memory[TEST_ADDRESS_7],
2477 Memory[TEST_ADDRESS_8],
2478 Memory[TEST_ADDRESS_9],
2479 Memory[TEST_ADDRESS_10],
2480 Memory[TEST_ADDRESS_11],
2481 Memory[TEST_ADDRESS_12]
2482 );
2483 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2484}
2485
2486
2487
2488void test_and_mark() {
2489 char buffer[1024];
2490 bool testing_complete;
2491 int len = sizeof(SOCKADDR);
2492 char chr;
2493 int i;
2494 int j;
2495 bool end_of_program;
2496 long address;
2497 long load_at;
2498 int code;
2499 int mark;
2500 int passed;
2501
2502 printf("\n");
2503 printf("Automatic Testing and Marking\n");
2504 printf("\n");
2505
2506 testing_complete = false;
2507
2508 sprintf(buffer, "Test Student %s", STUDENT_NUMBER);
2509 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2510
2511 while (!testing_complete) {
2512 memset(buffer, '\0', sizeof(buffer));
2513
2514 if (recvfrom(sock, buffer, sizeof(buffer) - 1, 0, (SOCKADDR *)&client_addr, &len) != SOCKET_ERROR) {
2515 printf("Incoming Data: %s \n", buffer);
2516
2517 //if (strcmp(buffer, "Testing complete") == 1)
2518 if (sscanf(buffer, "Testing complete %d", &mark) == 1) {
2519 testing_complete = true;
2520 printf("Current mark = %d\n", mark);
2521
2522 }
2523 else if (sscanf(buffer, "Tests passed %d", &passed) == 1) {
2524 //testing_complete = true;
2525 printf("Passed = %d\n", passed);
2526
2527 }
2528 else if (strcmp(buffer, "Error") == 0) {
2529 printf("ERROR> Testing abnormally terminated\n");
2530 testing_complete = true;
2531 }
2532 else {
2533 // Clear Registers and Memory
2534
2535 Registers[REGISTER_A] = 0;
2536 Registers[REGISTER_B] = 0;
2537 Registers[REGISTER_C] = 0;
2538 Registers[REGISTER_D] = 0;
2539 Registers[REGISTER_E] = 0;
2540 Registers[REGISTER_F] = 0;
2541 Index_Registers[REGISTER_X] = 0;
2542 Index_Registers[REGISTER_Y] = 0;
2543 Flags = 0;
2544 ProgramCounter = 0;
2545 StackPointer = 0;
2546 for (i = 0; i<MEMORY_SIZE; i++) {
2547 Memory[i] = 0;
2548 }
2549
2550 // Load hex file
2551
2552 i = 0;
2553 j = 0;
2554 load_at = 0;
2555 end_of_program = false;
2556 FILE *ofp;
2557 fopen_s(&ofp, "branch.txt", "a");
2558
2559 while (!end_of_program) {
2560 chr = buffer[i];
2561 switch (chr) {
2562 case '\0':
2563 end_of_program = true;
2564
2565 case ',':
2566 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
2567 load_at = address;
2568 }
2569 else if (sscanf(InputBuffer, "%x", &code) == 1) {
2570 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
2571 Memory[load_at] = (BYTE)code;
2572 fprintf(ofp, "%02X\n", (BYTE)code);
2573 }
2574 load_at++;
2575 }
2576 else {
2577 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
2578 }
2579 j = 0;
2580 break;
2581
2582 default:
2583 InputBuffer[j] = chr;
2584 j++;
2585 break;
2586 }
2587 i++;
2588 }
2589 fclose(ofp);
2590 // Emulate
2591
2592 if (load_at > 1) {
2593 emulate();
2594 // Send and store results
2595 sprintf(buffer, "%02X%02X %02X%02X %02X%02X %02X%02X %02X%02X %02X%02X",
2596 Memory[TEST_ADDRESS_1],
2597 Memory[TEST_ADDRESS_2],
2598 Memory[TEST_ADDRESS_3],
2599 Memory[TEST_ADDRESS_4],
2600 Memory[TEST_ADDRESS_5],
2601 Memory[TEST_ADDRESS_6],
2602 Memory[TEST_ADDRESS_7],
2603 Memory[TEST_ADDRESS_8],
2604 Memory[TEST_ADDRESS_9],
2605 Memory[TEST_ADDRESS_10],
2606 Memory[TEST_ADDRESS_11],
2607 Memory[TEST_ADDRESS_12]
2608 );
2609 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2610 }
2611 }
2612 }
2613 }
2614}
2615
2616
2617
2618int _tmain(int argc, _TCHAR* argv[])
2619{
2620 char chr;
2621 char dummy;
2622
2623 printf("\n");
2624 printf("Microprocessor Emulator\n");
2625 printf("UWE Computer and Network Systems Assignment 1\n");
2626 printf("\n");
2627
2628 initialise_filenames();
2629
2630 if (WSAStartup(MAKEWORD(2, 2), &data) != 0) return(0);
2631
2632 sock = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); // Here we create our socket, which will be a UDP socket (SOCK_DGRAM).
2633 if (!sock) {
2634 // Creation failed!
2635 }
2636
2637 memset(&server_addr, 0, sizeof(SOCKADDR_IN));
2638 server_addr.sin_family = AF_INET;
2639 server_addr.sin_addr.s_addr = inet_addr(IP_ADDRESS_SERVER);
2640 server_addr.sin_port = htons(PORT_SERVER);
2641
2642 memset(&client_addr, 0, sizeof(SOCKADDR_IN));
2643 client_addr.sin_family = AF_INET;
2644 client_addr.sin_addr.s_addr = inet_addr("127.0.0.1");
2645 client_addr.sin_port = htons(PORT_CLIENT);
2646
2647 chr = '\0';
2648 while ((chr != 'e') && (chr != 'E'))
2649 {
2650 printf("\n");
2651 printf("Please select option\n");
2652 printf("L - Load and run a hex file\n");
2653 printf("T - Have the server test and mark your emulator\n");
2654 printf("E - Exit\n");
2655 if (argc == 2) { building(argc, argv); exit(0); }
2656 printf("Enter option: ");
2657 chr = getchar();
2658 if (chr != 0x0A)
2659 {
2660 dummy = getchar(); // read in the <CR>
2661 }
2662 printf("\n");
2663
2664 switch (chr)
2665 {
2666 case 'L':
2667 case 'l':
2668 load_and_run(argc, argv);
2669 break;
2670
2671 case 'T':
2672 case 't':
2673 test_and_mark();
2674 break;
2675
2676 default:
2677 break;
2678 }
2679 }
2680
2681 closesocket(sock);
2682 WSACleanup();
2683
2684
2685 return 0;
2686}