· 5 years ago · Feb 18, 2020, 06:48 PM
1#include "stdafx.h"
2#include <winsock2.h>
3
4#pragma comment(lib, "wsock32.lib")
5
6
7#define STUDENT_NUMBER "18007506"
8
9#define IP_ADDRESS_SERVER "127.0.0.1"
10
11#define PORT_SERVER 0x1984 // We define a port that we are going to use.
12#define PORT_CLIENT 0x1985 // We define a port that we are going to use.
13
14#define WORD unsigned short
15#define DWORD unsigned long
16#define BYTE unsigned char
17
18#define MAX_FILENAME_SIZE 500
19#define MAX_BUFFER_SIZE 500
20
21SOCKADDR_IN server_addr;
22SOCKADDR_IN client_addr;
23
24SOCKET sock; // This is our socket, it is the handle to the IO address to read/write packets
25
26WSADATA data;
27
28char InputBuffer [MAX_BUFFER_SIZE];
29
30char hex_file [MAX_BUFFER_SIZE];
31char trc_file [MAX_BUFFER_SIZE];
32
33//////////////////////////
34// Registers //
35//////////////////////////
36
37#define FLAG_I 0x80
38#define FLAG_N 0x20
39#define FLAG_V 0x10
40#define FLAG_Z 0x08
41#define FLAG_C 0x01
42
43#define REGISTER_M 7
44#define REGISTER_A 6
45#define REGISTER_H 5
46#define REGISTER_L 4
47#define REGISTER_E 3
48#define REGISTER_D 2
49#define REGISTER_C 1
50#define REGISTER_B 0
51WORD IndexRegister;
52
53BYTE Registers[8];
54BYTE Flags;
55WORD ProgramCounter;
56WORD StackPointer;
57
58
59////////////
60// Memory //
61////////////
62
63#define MEMORY_SIZE 65536
64
65BYTE Memory[MEMORY_SIZE];
66
67#define TEST_ADDRESS_1 0x01FA
68#define TEST_ADDRESS_2 0x01FB
69#define TEST_ADDRESS_3 0x01FC
70#define TEST_ADDRESS_4 0x01FD
71#define TEST_ADDRESS_5 0x01FE
72#define TEST_ADDRESS_6 0x01FF
73#define TEST_ADDRESS_7 0x0200
74#define TEST_ADDRESS_8 0x0201
75#define TEST_ADDRESS_9 0x0202
76#define TEST_ADDRESS_10 0x0203
77#define TEST_ADDRESS_11 0x0204
78#define TEST_ADDRESS_12 0x0205
79
80
81///////////////////////
82// Control variables //
83///////////////////////
84
85bool memory_in_range = true;
86bool halt = false;
87
88
89///////////////////////
90// Disassembly table //
91///////////////////////
92
93char opcode_mneumonics[][14] =
94{
95"BRA rel ",
96"BCC rel ",
97"BCS rel ",
98"BNE rel ",
99"BEQ rel ",
100"BVC rel ",
101"BVS rel ",
102"BMI rel ",
103"BPL rel ",
104"BGE rel ",
105"BLE rel ",
106"BLS rel ",
107"BHI rel ",
108"ILLEGAL ",
109"RTN impl ",
110"ILLEGAL ",
111
112"ST abs ",
113"PSH ,A ",
114"POP A, ",
115"ILLEGAL ",
116"ILLEGAL ",
117"CLC impl ",
118"SEC impl ",
119"CLI impl ",
120"STI impl ",
121"SEV impl ",
122"CLV impl ",
123"DEX impl ",
124"INX impl ",
125"NOP impl ",
126"WAI impl ",
127"ILLEGAL ",
128
129"ST abs,X ",
130"PSH ,s ",
131"POP s, ",
132"ILLEGAL ",
133"ILLEGAL ",
134"ADI # ",
135"SBI # ",
136"CPI # ",
137"ANI # ",
138"XRI # ",
139"MVI #,B ",
140"MVI #,C ",
141"MVI #,D ",
142"MVI #,E ",
143"MVI #,L ",
144"MVI #,H ",
145
146"ILLEGAL ",
147"PSH ,B ",
148"POP B, ",
149"JPR abs ",
150"CCC abs ",
151"CCS abs ",
152"CNE abs ",
153"CEQ abs ",
154"CVC abs ",
155"CVS abs ",
156"CMI abs ",
157"CPL abs ",
158"CHI abs ",
159"CLE abs ",
160"ILLEGAL ",
161"ILLEGAL ",
162
163"ILLEGAL ",
164"PSH ,C ",
165"POP C, ",
166"TST abs ",
167"INC abs ",
168"DEC abs ",
169"RCR abs ",
170"RCL abs ",
171"SAL abs ",
172"ASR abs ",
173"NOT abs ",
174"ROL abs ",
175"ROR abs ",
176"ILLEGAL ",
177"LDX # ",
178"LODS # ",
179
180"STOX abs ",
181"PSH ,D ",
182"POP D, ",
183"TST abs,X ",
184"INC abs,X ",
185"DEC abs,X ",
186"RCR abs,X ",
187"RCL abs,X ",
188"SAL abs,X ",
189"ASR abs,X ",
190"NOT abs,X ",
191"ROL abs,X ",
192"ROR abs,X ",
193"ILLEGAL ",
194"LDX abs ",
195"LODS abs ",
196
197"STOX abs,X ",
198"PSH ,E ",
199"POP E, ",
200"TSTA A,A ",
201"INCA A,A ",
202"DECA A,A ",
203"RCRA A,A ",
204"RCLA A,A ",
205"SALA A,A ",
206"ASRA A,A ",
207"NOTA A,A ",
208"ROLA A,A ",
209"RORA A,A ",
210"ILLEGAL ",
211"LDX abs,X ",
212"LODS abs,X ",
213
214"ILLEGAL ",
215"PSH ,L ",
216"POP L, ",
217"ILLEGAL ",
218"TAS impl ",
219"TSA impl ",
220"ILLEGAL ",
221"ILLEGAL ",
222"MOVE A,A ",
223"MOVE B,A ",
224"MOVE C,A ",
225"MOVE D,A ",
226"MOVE E,A ",
227"MOVE L,A ",
228"MOVE H,A ",
229"MOVE M,A ",
230
231"ILLEGAL ",
232"PSH ,H ",
233"POP H, ",
234"ILLEGAL ",
235"ILLEGAL ",
236"SWI impl ",
237"RTI impl ",
238"ILLEGAL ",
239"MOVE A,B ",
240"MOVE B,B ",
241"MOVE C,B ",
242"MOVE D,B ",
243"MOVE E,B ",
244"MOVE L,B ",
245"MOVE H,B ",
246"MOVE M,B ",
247
248"ADC A,B ",
249"SBC A,B ",
250"CMP A,B ",
251"IOR A,B ",
252"AND A,B ",
253"XOR A,B ",
254"BT A,B ",
255"ILLEGAL ",
256"MOVE A,C ",
257"MOVE B,C ",
258"MOVE C,C ",
259"MOVE D,C ",
260"MOVE E,C ",
261"MOVE L,C ",
262"MOVE H,C ",
263"MOVE M,C ",
264
265"ADC A,C ",
266"SBC A,C ",
267"CMP A,C ",
268"IOR A,C ",
269"AND A,C ",
270"XOR A,C ",
271"BT A,C ",
272"ILLEGAL ",
273"MOVE A,D ",
274"MOVE B,D ",
275"MOVE C,D ",
276"MOVE D,D ",
277"MOVE E,D ",
278"MOVE L,D ",
279"MOVE H,D ",
280"MOVE M,D ",
281
282"ADC A,D ",
283"SBC A,D ",
284"CMP A,D ",
285"IOR A,D ",
286"AND A,D ",
287"XOR A,D ",
288"BT A,D ",
289"LD # ",
290"MOVE A,E ",
291"MOVE B,E ",
292"MOVE C,E ",
293"MOVE D,E ",
294"MOVE E,E ",
295"MOVE L,E ",
296"MOVE H,E ",
297"MOVE M,E ",
298
299"ADC A,E ",
300"SBC A,E ",
301"CMP A,E ",
302"IOR A,E ",
303"AND A,E ",
304"XOR A,E ",
305"BT A,E ",
306"LD abs ",
307"MOVE A,L ",
308"MOVE B,L ",
309"MOVE C,L ",
310"MOVE D,L ",
311"MOVE E,L ",
312"MOVE L,L ",
313"MOVE H,L ",
314"MOVE M,L ",
315
316"ADC A,L ",
317"SBC A,L ",
318"CMP A,L ",
319"IOR A,L ",
320"AND A,L ",
321"XOR A,L ",
322"BT A,L ",
323"LD abs,X ",
324"MOVE A,H ",
325"MOVE B,H ",
326"MOVE C,H ",
327"MOVE D,H ",
328"MOVE E,H ",
329"MOVE L,H ",
330"MOVE H,H ",
331"MOVE M,H ",
332
333"ADC A,H ",
334"SBC A,H ",
335"CMP A,H ",
336"IOR A,H ",
337"AND A,H ",
338"XOR A,H ",
339"BT A,H ",
340"ILLEGAL ",
341"MOVE A,M ",
342"MOVE B,M ",
343"MOVE C,M ",
344"MOVE D,M ",
345"MOVE E,M ",
346"MOVE L,M ",
347"MOVE H,M ",
348"MOVE -,- ",
349
350"ADC A,M ",
351"SBC A,M ",
352"CMP A,M ",
353"IOR A,M ",
354"AND A,M ",
355"XOR A,M ",
356"BT A,M ",
357"ILLEGAL ",
358"ILLEGAL ",
359"ILLEGAL ",
360"JMP abs ",
361"ILLEGAL ",
362"ILLEGAL ",
363"ILLEGAL ",
364"ILLEGAL ",
365"ILLEGAL ",
366
367};
368
369////////////////////////////////////////////////////////////////////////////////
370// Simulator/Emulator (Start) //
371////////////////////////////////////////////////////////////////////////////////
372BYTE fetch()
373{
374 BYTE byte = 0;
375
376 if ((ProgramCounter >= 0) && (ProgramCounter <= MEMORY_SIZE))
377 {
378 memory_in_range = true;
379 byte = Memory[ProgramCounter];
380 ProgramCounter++;
381 }
382 else
383 {
384 memory_in_range = false;
385 }
386 return byte;
387}
388
389void set_flag_n(BYTE inReg) {
390 BYTE reg;
391 reg = inReg;
392 if ((reg & 0x80) != 0) // msbit set
393 {
394 Flags = Flags | FLAG_N;
395 }
396 else
397 {
398 Flags = Flags & (0xFF - FLAG_N);
399 }
400}
401
402
403void set_flag_v(BYTE in1, BYTE in2, BYTE out1)
404{
405 BYTE reg1in;
406 BYTE reg2in;
407 BYTE regOut;
408
409 reg1in = in1;
410 reg2in = in2;
411 regOut = out1;
412
413 if ((((reg1in & 0x80) == 0x80) && ((reg2in & 0x80) == 0x80) && ((regOut & 0x80) != 0x80)) //overflow
414 || (((reg1in & 0x80) != 0x80) && ((reg2in & 0x80) != 0x80) && ((regOut & 0x80) == 0x80))) //overflow
415 {
416 Flags = Flags | FLAG_V;
417 }
418
419 else
420 {
421 Flags = Flags & (0xFF - FLAG_V);
422 }
423}
424
425
426void set_flag_z(BYTE inReg) {
427 BYTE reg;
428 reg = inReg;
429 if (reg == 0) // zero set
430 {
431 Flags = Flags | FLAG_Z;
432 }
433 else
434 {
435 Flags = Flags & (0xFF - FLAG_Z);
436 }
437}
438
439
440void Group_1(BYTE opcode){
441 BYTE LB = 0;
442 BYTE HB = 0;
443
444 WORD address = 0;
445 WORD data = 0;
446 WORD param1;
447 WORD param2;
448 WORD temp_word;
449
450 switch (opcode) {
451 case 0xB7: //LD Immidiate
452 data = fetch();
453 Registers[REGISTER_A] = data;
454 set_flag_n(Registers[REGISTER_A]);
455 set_flag_z(Registers[REGISTER_A]);
456 Flags = Flags & (0xFF - FLAG_C);
457 break;
458
459 case 0xC7:
460 HB = fetch();
461 LB = fetch();
462 address += (WORD)((WORD)HB << 8) + LB;
463 if (address >= 0 && address < MEMORY_SIZE) {
464 Registers[REGISTER_A] = Memory[address];
465 }
466 set_flag_n(Registers[REGISTER_A]);
467 set_flag_z(Registers[REGISTER_A]);
468 Flags = Flags & (0xFF - FLAG_C);
469 break;
470
471 case 0xD7:
472 address += IndexRegister;
473 HB = fetch(); LB = fetch();
474 address += (WORD)((WORD)HB << 8) + LB;
475 if (address >= 0 && address < MEMORY_SIZE) {
476 Registers[REGISTER_A] = Memory[address];
477 }
478 set_flag_n(Registers[REGISTER_A]);
479 set_flag_z(Registers[REGISTER_A]);
480 Flags = Flags & (0xFF - FLAG_C);
481 break;
482
483 ///-------------ST------------///
484
485 case 0x10:
486 HB = fetch();
487 LB = fetch(); address += (WORD)((WORD)HB << 8) + LB;
488 if (address >= 0 && address < MEMORY_SIZE) {
489 Memory[address] = Registers[REGISTER_A];
490 }
491 set_flag_n(Registers[REGISTER_A]);
492 set_flag_z(Registers[REGISTER_A]);
493 Flags = Flags & (0xFF - FLAG_C);
494 break;
495
496 case 0x20:
497 address += IndexRegister;
498 HB = fetch();
499 LB = fetch();
500 address += (WORD)((WORD)HB << 8) + LB
501 ; if (address >= 0 && address < MEMORY_SIZE) {
502 Memory[address] = Registers[REGISTER_A];
503 }
504 set_flag_n(Registers[REGISTER_A]);
505 set_flag_z(Registers[REGISTER_A]);
506 Flags = Flags & (0xFF - FLAG_C);
507 break;
508
509 ////------MVI------///
510
511 case 0x2A:
512 data = fetch();
513 Registers[REGISTER_B] = data;
514 set_flag_n(Registers[REGISTER_A]);
515 set_flag_z(Registers[REGISTER_A]);
516 Flags = Flags & (0xFF - FLAG_C);
517 break;
518
519 case 0x2B:
520 data = fetch();
521 Registers[REGISTER_C] = data;
522 set_flag_n(Registers[REGISTER_A]);
523 set_flag_z(Registers[REGISTER_A]);
524 Flags = Flags & (0xFF - FLAG_C);
525 break;
526
527 case 0x2C:
528 data = fetch();
529 Registers[REGISTER_D] = data;
530 set_flag_n(Registers[REGISTER_A]);
531 set_flag_z(Registers[REGISTER_A]);
532 Flags = Flags & (0xFF - FLAG_C);
533 break;
534
535 case 0x2D:
536 data = fetch();
537 Registers[REGISTER_E] = data;
538 set_flag_n(Registers[REGISTER_A]);
539 set_flag_z(Registers[REGISTER_A]);
540 Flags = Flags & (0xFF - FLAG_C);
541 break;
542
543 case 0x2E:
544 data = fetch();
545 Registers[REGISTER_L] = data;
546 set_flag_n(Registers[REGISTER_A]);
547 set_flag_z(Registers[REGISTER_A]);
548 Flags = Flags & (0xFF - FLAG_C);
549 break;
550
551 case 0x2F:
552 data = fetch();
553 Registers[REGISTER_H] = data;
554 set_flag_n(Registers[REGISTER_A]);
555 set_flag_z(Registers[REGISTER_A]);
556 Flags = Flags & (0xFF - FLAG_C);
557 break;
558 ////----LODS-----///
559 case 0x4F:
560 data = fetch();
561 StackPointer = data << 8;
562 StackPointer += fetch();
563 break;
564
565 case 0x5f:
566 HB = fetch();
567 LB = fetch();
568 address += (WORD)((WORD)HB << 8) + LB;
569 if (address >= 0 && address < MEMORY_SIZE - 1) {
570 StackPointer = (WORD)Memory[address] << 8;
571 StackPointer += Memory[address + 1];
572 }
573 break;
574
575 case 0x6f:
576 address += IndexRegister;
577 HB = fetch();
578 LB = fetch();
579 address += (WORD)((WORD)HB << 8) + LB;
580 if (address >= 0 && address < MEMORY_SIZE - 1) {
581 StackPointer = (WORD)Memory[address] << 8;
582 StackPointer += Memory[address + 1];
583 }
584 break;
585
586 /*
587 * Opcode: LDX
588 * Description: Loads Memory into register X
589 * Flags: - - T - T - - 0
590 * Notes: None
591 */
592 case 0x4E: //LDX IMMEDIATE ADDRESSING (#)
593 data = fetch();
594 Registers[IndexRegister] = data;
595
596 set_flag_n(Registers[IndexRegister]);
597 set_flag_z(Registers[IndexRegister]);
598 Flags = Flags & (0xFF - FLAG_C);
599 break;
600
601 case 0x5E: //LDX ABSOLUTE ADDRESSING (abs)
602 HB = fetch();
603 LB = fetch();
604 address += (WORD)((WORD)HB << 8) + LB;
605 if (address >= 0 && address < MEMORY_SIZE) {
606 Registers[IndexRegister] = Memory[address];
607 }
608
609 set_flag_n(Registers[IndexRegister]);
610 set_flag_z(Registers[IndexRegister]);
611 Flags = Flags & (0xFF - FLAG_C);
612 break;
613
614 case 0x6E: //LDX INDEXED ABSOLUTE ADDRESSING (abs,X)
615 address += IndexRegister;
616 HB = fetch();
617 LB = fetch();
618 address += (WORD)((WORD)HB << 8) + LB;
619 if (address >= 0 && address < MEMORY_SIZE) {
620 Registers[IndexRegister] = Memory[address];
621 }
622
623 set_flag_n(Registers[IndexRegister]);
624 set_flag_z(Registers[IndexRegister]);
625 Flags = Flags & (0xFF - FLAG_C);
626 break;
627
628 /*
629 * Opcode: STOX
630 * Description: Stores register X into Memory
631 * Flags: - - T - T - - 0
632 * Notes: None
633 */
634 case 0x50: //STOX ABSOLUTE ADDRESSING (abs)
635 address += IndexRegister;
636 HB = fetch();
637 LB = fetch();
638 address += (WORD)((WORD)HB << 8) + LB;
639 if (address >= 0 && address < MEMORY_SIZE) {
640 Memory[address] = Registers[IndexRegister];
641 }
642
643 set_flag_n(Registers[IndexRegister]);
644 set_flag_z(Registers[IndexRegister]);
645 Flags = Flags & (0xFF - FLAG_C);
646 break;
647
648 case 0x60: //STOX INDEXED ABSOLUTE ADDRESSING (abs, X)
649 address += IndexRegister;
650 HB = fetch();
651 LB = fetch();
652 address += (WORD)((WORD)HB << 8) + LB;
653 if (address >= 0 && address < MEMORY_SIZE) {
654 Memory[address] = Registers[IndexRegister];
655 }
656
657 set_flag_n(Registers[IndexRegister]);
658 set_flag_z(Registers[IndexRegister]);
659 Flags = Flags & (0xFF - FLAG_C);
660 break;
661
662
663 /////-----ADC-----/////
664
665 case 0x90:
666 param1 = Registers[REGISTER_A];
667 param2 = Registers[REGISTER_B];
668 temp_word = (WORD)param1 + (WORD)param2;
669 if ((Flags & FLAG_C) != 0) {
670 temp_word++;
671 }
672 if (temp_word >= 0x100) {
673 Flags = Flags | FLAG_C; // Set carry flag
674 }
675 else {
676 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
677 }
678 set_flag_n((BYTE)temp_word);
679 set_flag_z((BYTE)temp_word);
680 set_flag_v(param1, param2, (BYTE)temp_word);
681 Registers[REGISTER_A] = (BYTE)temp_word;
682 break;
683
684 case 0xA0:
685 param1 = Registers[REGISTER_A];
686 param2 = Registers[REGISTER_C];
687 temp_word = (WORD)param1 + (WORD)param2;
688 if ((Flags & FLAG_C) != 0) {
689 temp_word++;
690 }
691 if (temp_word >= 0x100) {
692 Flags = Flags | FLAG_C; // Set carry flag
693 }
694 else {
695 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
696 }
697 set_flag_n((BYTE)temp_word);
698 set_flag_z((BYTE)temp_word);
699 set_flag_v(param1, param2, (BYTE)temp_word);
700 Registers[REGISTER_A] = (BYTE)temp_word;
701 break;
702
703 case 0xB0:
704 param1 = Registers[REGISTER_A];
705 param2 = Registers[REGISTER_D];
706 temp_word = (WORD)param1 + (WORD)param2;
707 if ((Flags & FLAG_C) != 0) {
708 temp_word++;
709 }
710 if (temp_word >= 0x100) {
711 Flags = Flags | FLAG_C; // Set carry flag
712 }
713 else {
714 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
715 }
716 set_flag_n((BYTE)temp_word);
717 set_flag_z((BYTE)temp_word);
718 set_flag_v(param1, param2, (BYTE)temp_word);
719 Registers[REGISTER_A] = (BYTE)temp_word;
720 break;
721
722 case 0xC0:
723 param1 = Registers[REGISTER_A];
724 param2 = Registers[REGISTER_E];
725 temp_word = (WORD)param1 + (WORD)param2;
726 if ((Flags & FLAG_C) != 0) {
727 temp_word++;
728 }
729 if (temp_word >= 0x100) {
730 Flags = Flags | FLAG_C; // Set carry flag
731 }
732 else {
733 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
734 }
735 set_flag_n((BYTE)temp_word);
736 set_flag_z((BYTE)temp_word);
737 set_flag_v(param1, param2, (BYTE)temp_word);
738 Registers[REGISTER_A] = (BYTE)temp_word;
739 break;
740
741 case 0xD0:
742 param1 = Registers[REGISTER_A];
743 param2 = Registers[REGISTER_L];
744 temp_word = (WORD)param1 + (WORD)param2;
745 if ((Flags & FLAG_C) != 0) {
746 temp_word++;
747 }
748 if (temp_word >= 0x100) {
749 Flags = Flags | FLAG_C; // Set carry flag
750 }
751 else {
752 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
753 }
754 set_flag_n((BYTE)temp_word);
755 set_flag_z((BYTE)temp_word);
756 set_flag_v(param1, param2, (BYTE)temp_word);
757 Registers[REGISTER_A] = (BYTE)temp_word;
758 break;
759
760 case 0xE0:
761 param1 = Registers[REGISTER_A];
762 param2 = Registers[REGISTER_H];
763 temp_word = (WORD)param1 + (WORD)param2;
764 if ((Flags & FLAG_C) != 0) {
765 temp_word++;
766 }
767 if (temp_word >= 0x100) {
768 Flags = Flags | FLAG_C; // Set carry flag
769 }
770 else {
771 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
772 }
773 set_flag_n((BYTE)temp_word);
774 set_flag_z((BYTE)temp_word);
775 set_flag_v(param1, param2, (BYTE)temp_word);
776 Registers[REGISTER_A] = (BYTE)temp_word;
777 break;
778
779 case 0xF0:
780 param1 = Registers[REGISTER_A];
781 param2 = Registers[REGISTER_M];
782 temp_word = (WORD)param1 + (WORD)param2;
783 if ((Flags & FLAG_C) != 0) {
784 temp_word++;
785 }
786 if (temp_word >= 0x100) {
787 Flags = Flags | FLAG_C; // Set carry flag
788 }
789 else {
790 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
791 }
792 set_flag_n((BYTE)temp_word);
793 set_flag_z((BYTE)temp_word);
794 set_flag_v(param1, param2, (BYTE)temp_word);
795 Registers[REGISTER_A] = (BYTE)temp_word;
796 break;
797
798 /////-------CMP--------/////
799
800 case 0x92:
801 param1 = Registers[REGISTER_A];
802 param2 = Registers[REGISTER_B];
803 temp_word = (WORD)param1 - (WORD)param2;
804 if (temp_word >= 0x100) {
805 Flags = Flags | FLAG_C; // Set carry flag
806 }
807 else {
808 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
809 }
810 set_flag_n((BYTE)temp_word);
811 set_flag_z((BYTE)temp_word);
812 set_flag_v(param1, param2, (BYTE)temp_word);
813 break;
814
815 case 0xA2:
816 param1 = Registers[REGISTER_A];
817 param2 = Registers[REGISTER_C];
818 temp_word = (WORD)param1 - (WORD)param2;
819 if (temp_word >= 0x100) {
820 Flags = Flags | FLAG_C; // Set carry flag
821 }
822 else {
823 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
824 }
825 set_flag_n((BYTE)temp_word);
826 set_flag_z((BYTE)temp_word);
827 set_flag_v(param1, param2, (BYTE)temp_word);
828 break;
829
830 case 0xB2:
831 param1 = Registers[REGISTER_A];
832 param2 = Registers[REGISTER_D];
833 temp_word = (WORD)param1 - (WORD)param2;
834 if (temp_word >= 0x100) {
835 Flags = Flags | FLAG_C; // Set carry flag
836 }
837 else {
838 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
839 }
840 set_flag_n((BYTE)temp_word);
841 set_flag_z((BYTE)temp_word);
842 set_flag_v(param1, param2, (BYTE)temp_word);
843 break;
844
845 case 0xC2:
846 param1 = Registers[REGISTER_A];
847 param2 = Registers[REGISTER_E];
848 temp_word = (WORD)param1 - (WORD)param2;
849 if (temp_word >= 0x100) {
850 Flags = Flags | FLAG_C; // Set carry flag
851 }
852 else {
853 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
854 }
855 set_flag_n((BYTE)temp_word);
856 set_flag_z((BYTE)temp_word);
857 set_flag_v(param1, param2, (BYTE)temp_word);
858 break;
859
860 case 0xD2:
861 param1 = Registers[REGISTER_A];
862 param2 = Registers[REGISTER_L];
863 temp_word = (WORD)param1 - (WORD)param2;
864 if (temp_word >= 0x100) {
865 Flags = Flags | FLAG_C; // Set carry flag
866 }
867 else {
868 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
869 }
870 set_flag_n((BYTE)temp_word);
871 set_flag_z((BYTE)temp_word);
872 set_flag_v(param1, param2, (BYTE)temp_word);
873 break;
874
875 case 0xE2:
876 param1 = Registers[REGISTER_A];
877 param2 = Registers[REGISTER_H];
878 temp_word = (WORD)param1 - (WORD)param2;
879 if (temp_word >= 0x100) {
880 Flags = Flags | FLAG_C; // Set carry flag
881 }
882 else {
883 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
884 }
885 set_flag_n((BYTE)temp_word);
886 set_flag_z((BYTE)temp_word);
887 set_flag_v(param1, param2, (BYTE)temp_word);
888 break;
889
890 case 0xF2:
891 param1 = Registers[REGISTER_A];
892 param2 = Registers[REGISTER_M];
893 temp_word = (WORD)param1 - (WORD)param2;
894 if (temp_word >= 0x100) {
895 Flags = Flags | FLAG_C; // Set carry flag
896 }
897 else {
898 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
899 }
900 set_flag_n((BYTE)temp_word);
901 set_flag_z((BYTE)temp_word);
902 set_flag_v(param1, param2, (BYTE)temp_word);
903 break;
904
905
906 //////-----------TSA-------------//////
907
908 case 0x75:
909 Registers[REGISTER_A] = Flags;
910 break;
911
912
913 //////-----------TAS-------------//////
914
915 case 0x74:
916 Flags = Registers[REGISTER_A];
917 break;
918
919 //////-----------SEC-------------//////
920 case 0x16:
921 Flags = Flags | FLAG_C;
922 break;
923
924 /////-----------CLC----------/////
925
926 case 0x15:
927 Flags = Flags & (0xFF - FLAG_C);
928 break;
929
930 /////----------CLI------------/////
931 case 0x17:
932 Flags = Flags & (0xFF - FLAG_I);
933 break;
934 /////----------STI------------/////
935 case 0x18:
936 Flags = Flags | FLAG_I;
937 break;
938
939 /////----------SEV------------/////
940 Flags = Flags | FLAG_V;
941
942 /////----------CLV------------/////
943 Flags = Flags & (0xFF - FLAG_V);
944
945 /////-----------PSH-----------/////
946 case 0x11:
947 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
948 Memory[StackPointer] = Registers[REGISTER_A];
949 StackPointer--;
950 }
951 break;
952
953 case 0x21:
954 Memory[StackPointer] = Flags;
955 StackPointer--;
956 break;
957
958 case 0x31:
959 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
960 Memory[StackPointer] = Registers[REGISTER_B];
961 StackPointer--;
962 }
963 break;
964
965 case 0x41:
966 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
967 Memory[StackPointer] = Registers[REGISTER_C];
968 StackPointer--;
969 }
970 break;
971
972 case 0x51:
973 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
974 Memory[StackPointer] = Registers[REGISTER_D];
975 StackPointer--;
976 }
977 break;
978
979 case 0x61:
980 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
981 Memory[StackPointer] = Registers[REGISTER_E];
982 StackPointer--;
983 }
984 break;
985
986 case 0x71:
987 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
988 Memory[StackPointer] = Registers[REGISTER_L];
989 StackPointer--;
990 }
991 break;
992
993 case 0x81:
994 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
995 Memory[StackPointer] = Registers[REGISTER_H];
996 StackPointer--;
997 }
998 break;
999
1000 /////-----------POP------------////
1001
1002 case 0x12:
1003 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1004 StackPointer ++;
1005 Registers[REGISTER_A] = Memory[StackPointer];
1006 }
1007 break;
1008
1009 case 0x22:
1010 StackPointer++;
1011 Flags = Memory[StackPointer];
1012 break;
1013
1014 case 0x32:
1015 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1016 StackPointer++;
1017 Registers[REGISTER_B] = Memory[StackPointer];
1018 }
1019 break;
1020
1021 case 0x42:
1022 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1023 StackPointer++;
1024 Registers[REGISTER_C] = Memory[StackPointer];
1025 }
1026 break;
1027
1028 case 0x52:
1029 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1030 StackPointer++;
1031 Registers[REGISTER_D] = Memory[StackPointer];
1032 }
1033 break;
1034
1035 case 0x62:
1036 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1037 StackPointer++;
1038 Registers[REGISTER_E] = Memory[StackPointer];
1039 }
1040 break;
1041
1042 case 0x72:
1043 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1044 StackPointer++;
1045 Registers[REGISTER_L] = Memory[StackPointer];
1046 }
1047 break;
1048
1049 case 0x82:
1050 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1051 StackPointer++;
1052 Registers[REGISTER_H] = Memory[StackPointer];
1053 }
1054 break;
1055
1056 //////------JMP------//////
1057 case 0xFA:
1058 HB = fetch();
1059 LB = fetch();
1060 address = ((WORD)HB << 8) + (WORD)LB;
1061 ProgramCounter = address;
1062 break;
1063
1064 //////-----JPR-----------////
1065 case 0x33:
1066 HB = fetch();
1067 LB = fetch();
1068 address = ((WORD)HB << 8) + (WORD)LB;
1069 ProgramCounter = address;
1070 break;
1071
1072 /////------RTN---------/////
1073 case 0x0E:
1074 HB = fetch();
1075 LB = fetch();
1076 address = ((WORD)HB << 8) + (WORD)LB;
1077 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 2)) {
1078 StackPointer++;
1079 HB = Memory[StackPointer];
1080 StackPointer++;
1081 LB = Memory[StackPointer];
1082 }
1083 ProgramCounter = ((WORD)HB << 8) + (WORD)LB;
1084 break;
1085
1086 /////------BRA-------/////
1087
1088
1089
1090 }
1091}
1092
1093void Group_2_Move(BYTE opcode) {
1094 WORD address = 0;
1095
1096 BYTE source = opcode >> 4;
1097 BYTE dest = opcode & 0x0F;
1098 int destReg = 0;
1099 int sourceReg = 0;
1100/*---------------------------------MOVE DEST---------------------------------*/
1101 switch (dest) {
1102 case 0x08:
1103 destReg = REGISTER_A;
1104 break;
1105
1106 case 0x09:
1107 destReg = REGISTER_B;
1108 break;
1109
1110 case 0x0A:
1111 destReg = REGISTER_C;
1112 break;
1113
1114 case 0x0B:
1115 destReg = REGISTER_D;
1116 break;
1117
1118 case 0x0C:
1119 destReg = REGISTER_E;
1120 break;
1121
1122 case 0x0D:
1123 destReg = REGISTER_L;
1124 break;
1125
1126 case 0x0E:
1127 destReg = REGISTER_H;
1128 break;
1129
1130 case 0x0F:
1131 destReg = REGISTER_M;
1132 break;
1133 }
1134
1135/*--------------------------------MOVE SOURCE--------------------------------*/
1136 switch (source) {
1137 case 0x07:
1138 sourceReg = REGISTER_A;
1139 break;
1140
1141 case 0x08:
1142 sourceReg = REGISTER_B;
1143 break;
1144
1145 case 0x09:
1146 sourceReg = REGISTER_C;
1147 break;
1148
1149 case 0x0A:
1150 sourceReg = REGISTER_D;
1151 break;
1152
1153 case 0x0B:
1154 sourceReg = REGISTER_E;
1155 break;
1156
1157 case 0x0C:
1158 sourceReg = REGISTER_L;
1159 break;
1160
1161 case 0x0D:
1162 sourceReg = REGISTER_H;
1163 break;
1164
1165 case 0x0E:
1166 sourceReg = REGISTER_M;
1167 break;
1168 }
1169
1170 if (sourceReg == REGISTER_M) {
1171 address = Registers[REGISTER_L];
1172 address += (WORD)Registers[REGISTER_H] << 8;
1173 Registers[destReg] = Memory[address];
1174 }
1175 Registers[destReg] = Registers[sourceReg];
1176
1177 if (destReg == REGISTER_M) {
1178 address = Registers[REGISTER_L];
1179 address += (WORD)Registers[REGISTER_H] << 8;
1180 Memory[address] = Registers[REGISTER_M];
1181 }
1182}
1183
1184
1185
1186void execute(BYTE opcode)
1187{
1188 if (((opcode >= 0x78) && (opcode <= 0x7F))
1189 || ((opcode >= 0x88) && (opcode <= 0x8F))
1190 || ((opcode >= 0x98) && (opcode <= 0x9F))
1191 || ((opcode >= 0xA8) && (opcode <= 0xAF))
1192 || ((opcode >= 0xB8) && (opcode <= 0xBF))
1193 || ((opcode >= 0xC8) && (opcode <= 0xCF))
1194 || ((opcode >= 0xD8) && (opcode <= 0xDF))
1195 || ((opcode >= 0xE8) && (opcode <= 0xEF)))
1196 {
1197 Group_2_Move(opcode);
1198 }
1199 else
1200 {
1201 Group_1(opcode);
1202 }
1203}
1204
1205void emulate()
1206{
1207 BYTE opcode;
1208 int sanity;
1209 ProgramCounter = 0;
1210 halt = false;
1211 memory_in_range = true;
1212 sanity = 0;
1213
1214 printf(" A B C D E L H X SP\n");
1215 while ((!halt) && (memory_in_range)) {
1216 sanity++;
1217 if (sanity > 500) halt = true;
1218 printf("%04X ", ProgramCounter); // Print current address
1219 opcode = fetch();
1220 execute(opcode);
1221
1222 printf("%s ", opcode_mneumonics[opcode]); // Print current opcode
1223
1224 printf("%02X ", Registers[REGISTER_A]);
1225 printf("%02X ", Registers[REGISTER_B]);
1226 printf("%02X ", Registers[REGISTER_C]);
1227 printf("%02X ", Registers[REGISTER_D]);
1228 printf("%02X ", Registers[REGISTER_E]);
1229 printf("%02X ", Registers[REGISTER_L]);
1230 printf("%02X ", Registers[REGISTER_H]);
1231 printf("%04X ", IndexRegister);
1232 printf("%04X ", StackPointer); // Print Stack Pointer
1233
1234 if ((Flags & FLAG_I) == FLAG_I)
1235 {
1236 printf("I=1 ");
1237 }
1238 else
1239 {
1240 printf("I=0 ");
1241 }
1242 if ((Flags & FLAG_N) == FLAG_N)
1243 {
1244 printf("N=1 ");
1245 }
1246 else
1247 {
1248 printf("N=0 ");
1249 }
1250 if ((Flags & FLAG_V) == FLAG_V)
1251 {
1252 printf("V=1 ");
1253 }
1254 else
1255 {
1256 printf("V=0 ");
1257 }
1258 if ((Flags & FLAG_Z) == FLAG_Z)
1259 {
1260 printf("Z=1 ");
1261 }
1262 else
1263 {
1264 printf("Z=0 ");
1265 }
1266 if ((Flags & FLAG_C) == FLAG_C)
1267 {
1268 printf("C=1 ");
1269 }
1270 else
1271 {
1272 printf("C=0 ");
1273 }
1274
1275 printf("\n"); // New line
1276 }
1277
1278 printf("\n"); // New line
1279}
1280
1281
1282////////////////////////////////////////////////////////////////////////////////
1283// Simulator/Emulator (End) //
1284////////////////////////////////////////////////////////////////////////////////
1285
1286
1287void initialise_filenames() {
1288 int i;
1289
1290 for (i=0; i<MAX_FILENAME_SIZE; i++) {
1291 hex_file [i] = '\0';
1292 trc_file [i] = '\0';
1293 }
1294}
1295
1296
1297
1298
1299int find_dot_position(char *filename) {
1300 int dot_position;
1301 int i;
1302 char chr;
1303
1304 dot_position = 0;
1305 i = 0;
1306 chr = filename[i];
1307
1308 while (chr != '\0') {
1309 if (chr == '.') {
1310 dot_position = i;
1311 }
1312 i++;
1313 chr = filename[i];
1314 }
1315
1316 return (dot_position);
1317}
1318
1319
1320int find_end_position(char *filename) {
1321 int end_position;
1322 int i;
1323 char chr;
1324
1325 end_position = 0;
1326 i = 0;
1327 chr = filename[i];
1328
1329 while (chr != '\0') {
1330 end_position = i;
1331 i++;
1332 chr = filename[i];
1333 }
1334
1335 return (end_position);
1336}
1337
1338
1339bool file_exists(char *filename) {
1340 bool exists;
1341 FILE *ifp;
1342
1343 exists = false;
1344
1345 if ( ( ifp = fopen( filename, "r" ) ) != NULL ) {
1346 exists = true;
1347
1348 fclose(ifp);
1349 }
1350
1351 return (exists);
1352}
1353
1354
1355
1356void create_file(char *filename) {
1357 FILE *ofp;
1358
1359 if ( ( ofp = fopen( filename, "w" ) ) != NULL ) {
1360 fclose(ofp);
1361 }
1362}
1363
1364
1365
1366bool getline(FILE *fp, char *buffer) {
1367 bool rc;
1368 bool collect;
1369 char c;
1370 int i;
1371
1372 rc = false;
1373 collect = true;
1374
1375 i = 0;
1376 while (collect) {
1377 c = getc(fp);
1378
1379 switch (c) {
1380 case EOF:
1381 if (i > 0) {
1382 rc = true;
1383 }
1384 collect = false;
1385 break;
1386
1387 case '\n':
1388 if (i > 0) {
1389 rc = true;
1390 collect = false;
1391 buffer[i] = '\0';
1392 }
1393 break;
1394
1395 default:
1396 buffer[i] = c;
1397 i++;
1398 break;
1399 }
1400 }
1401
1402 return (rc);
1403}
1404
1405
1406
1407
1408
1409
1410void load_and_run(int args,_TCHAR** argv) {
1411 char chr;
1412 int ln;
1413 int dot_position;
1414 int end_position;
1415 long i;
1416 FILE *ifp;
1417 long address;
1418 long load_at;
1419 int code;
1420
1421 // Prompt for the .hex file
1422
1423 printf("\n");
1424 printf("Enter the hex filename (.hex): ");
1425
1426 if(args == 2){
1427 ln = 0;
1428 chr = argv[1][ln];
1429 while (chr != '\0')
1430 {
1431 if (ln < MAX_FILENAME_SIZE)
1432 {
1433 hex_file [ln] = chr;
1434 trc_file [ln] = chr;
1435 ln++;
1436 }
1437 chr = argv[1][ln];
1438 }
1439 } else {
1440 ln = 0;
1441 chr = '\0';
1442 while (chr != '\n') {
1443 chr = getchar();
1444
1445 switch(chr) {
1446 case '\n':
1447 break;
1448 default:
1449 if (ln < MAX_FILENAME_SIZE) {
1450 hex_file [ln] = chr;
1451 trc_file [ln] = chr;
1452 ln++;
1453 }
1454 break;
1455 }
1456 }
1457
1458 }
1459 // Tidy up the file names
1460
1461 dot_position = find_dot_position(hex_file);
1462 if (dot_position == 0) {
1463 end_position = find_end_position(hex_file);
1464
1465 hex_file[end_position + 1] = '.';
1466 hex_file[end_position + 2] = 'h';
1467 hex_file[end_position + 3] = 'e';
1468 hex_file[end_position + 4] = 'x';
1469 hex_file[end_position + 5] = '\0';
1470 } else {
1471 hex_file[dot_position + 0] = '.';
1472 hex_file[dot_position + 1] = 'h';
1473 hex_file[dot_position + 2] = 'e';
1474 hex_file[dot_position + 3] = 'x';
1475 hex_file[dot_position + 4] = '\0';
1476 }
1477
1478 dot_position = find_dot_position(trc_file);
1479 if (dot_position == 0) {
1480 end_position = find_end_position(trc_file);
1481
1482 trc_file[end_position + 1] = '.';
1483 trc_file[end_position + 2] = 't';
1484 trc_file[end_position + 3] = 'r';
1485 trc_file[end_position + 4] = 'c';
1486 trc_file[end_position + 5] = '\0';
1487 } else {
1488 trc_file[dot_position + 0] = '.';
1489 trc_file[dot_position + 1] = 't';
1490 trc_file[dot_position + 2] = 'r';
1491 trc_file[dot_position + 3] = 'c';
1492 trc_file[dot_position + 4] = '\0';
1493 }
1494
1495 if (file_exists(hex_file)) {
1496 // Clear Registers and Memory
1497
1498 Registers[REGISTER_A] = 0;
1499 Registers[REGISTER_B] = 0;
1500 Registers[REGISTER_C] = 0;
1501 Registers[REGISTER_D] = 0;
1502 Registers[REGISTER_E] = 0;
1503 Registers[REGISTER_L] = 0;
1504 Registers[REGISTER_H] = 0;
1505 IndexRegister = 0;
1506 Flags = 0;
1507 ProgramCounter = 0;
1508 StackPointer = 0;
1509
1510 for (i=0; i<MEMORY_SIZE; i++) {
1511 Memory[i] = 0x00;
1512 }
1513
1514 // Load hex file
1515
1516 if ( ( ifp = fopen( hex_file, "r" ) ) != NULL ) {
1517 printf("Loading file...\n\n");
1518
1519 load_at = 0;
1520
1521 while (getline(ifp, InputBuffer)) {
1522 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
1523 load_at = address;
1524 } else if (sscanf(InputBuffer, "%x", &code) == 1) {
1525 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
1526 Memory[load_at] = (BYTE)code;
1527 }
1528 load_at++;
1529 } else {
1530 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
1531 }
1532 }
1533
1534 fclose(ifp);
1535 }
1536
1537 // Emulate
1538
1539 emulate();
1540 } else {
1541 printf("\n");
1542 printf("ERROR> Input file %s does not exist!\n", hex_file);
1543 printf("\n");
1544 }
1545}
1546
1547void building(int args, _TCHAR** argv) {
1548 char buffer[1024];
1549 load_and_run(args,argv);
1550 sprintf(buffer, "0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X",
1551 Memory[TEST_ADDRESS_1],
1552 Memory[TEST_ADDRESS_2],
1553 Memory[TEST_ADDRESS_3],
1554 Memory[TEST_ADDRESS_4],
1555 Memory[TEST_ADDRESS_5],
1556 Memory[TEST_ADDRESS_6],
1557 Memory[TEST_ADDRESS_7],
1558 Memory[TEST_ADDRESS_8],
1559 Memory[TEST_ADDRESS_9],
1560 Memory[TEST_ADDRESS_10],
1561 Memory[TEST_ADDRESS_11],
1562 Memory[TEST_ADDRESS_12]
1563 );
1564 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
1565}
1566
1567
1568
1569void test_and_mark() {
1570 char buffer[1024];
1571 bool testing_complete;
1572 int len = sizeof(SOCKADDR);
1573 char chr;
1574 int i;
1575 int j;
1576 bool end_of_program;
1577 long address;
1578 long load_at;
1579 int code;
1580 int mark;
1581 int passed;
1582
1583 printf("\n");
1584 printf("Automatic Testing and Marking\n");
1585 printf("\n");
1586
1587 testing_complete = false;
1588
1589 sprintf(buffer, "Test Student %s", STUDENT_NUMBER);
1590 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
1591
1592 while (!testing_complete) {
1593 memset(buffer, '\0', sizeof(buffer));
1594
1595 if (recvfrom(sock, buffer, sizeof(buffer)-1, 0, (SOCKADDR *)&client_addr, &len) != SOCKET_ERROR) {
1596 printf("Incoming Data: %s \n", buffer);
1597
1598 //if (strcmp(buffer, "Testing complete") == 1)
1599 if (sscanf(buffer, "Testing complete %d", &mark) == 1) {
1600 testing_complete = true;
1601 printf("Current mark = %d\n", mark);
1602
1603 }else if (sscanf(buffer, "Tests passed %d", &passed) == 1) {
1604 //testing_complete = true;
1605 printf("Passed = %d\n", passed);
1606
1607 } else if (strcmp(buffer, "Error") == 0) {
1608 printf("ERROR> Testing abnormally terminated\n");
1609 testing_complete = true;
1610 } else {
1611 // Clear Registers and Memory
1612
1613 Registers[REGISTER_A] = 0;
1614 Registers[REGISTER_B] = 0;
1615 Registers[REGISTER_C] = 0;
1616 Registers[REGISTER_D] = 0;
1617 Registers[REGISTER_E] = 0;
1618 Registers[REGISTER_L] = 0;
1619 Registers[REGISTER_H] = 0;
1620 IndexRegister = 0;
1621 Flags = 0;
1622 ProgramCounter = 0;
1623 StackPointer = 0;
1624 for (i=0; i<MEMORY_SIZE; i++) {
1625 Memory[i] = 0;
1626 }
1627
1628 // Load hex file
1629
1630 i = 0;
1631 j = 0;
1632 load_at = 0;
1633 end_of_program = false;
1634 FILE *ofp;
1635 fopen_s(&ofp ,"branch.txt", "a");
1636
1637 while (!end_of_program) {
1638 chr = buffer[i];
1639 switch (chr) {
1640 case '\0':
1641 end_of_program = true;
1642
1643 case ',':
1644 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
1645 load_at = address;
1646 } else if (sscanf(InputBuffer, "%x", &code) == 1) {
1647 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
1648 Memory[load_at] = (BYTE)code;
1649 fprintf(ofp, "%02X\n", (BYTE)code);
1650 }
1651 load_at++;
1652 } else {
1653 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
1654 }
1655 j = 0;
1656 break;
1657
1658 default:
1659 InputBuffer[j] = chr;
1660 j++;
1661 break;
1662 }
1663 i++;
1664 }
1665 fclose(ofp);
1666 // Emulate
1667
1668 if (load_at > 1) {
1669 emulate();
1670 // Send and store results
1671 sprintf(buffer, "%02X%02X %02X%02X %02X%02X %02X%02X %02X%02X %02X%02X",
1672 Memory[TEST_ADDRESS_1],
1673 Memory[TEST_ADDRESS_2],
1674 Memory[TEST_ADDRESS_3],
1675 Memory[TEST_ADDRESS_4],
1676 Memory[TEST_ADDRESS_5],
1677 Memory[TEST_ADDRESS_6],
1678 Memory[TEST_ADDRESS_7],
1679 Memory[TEST_ADDRESS_8],
1680 Memory[TEST_ADDRESS_9],
1681 Memory[TEST_ADDRESS_10],
1682 Memory[TEST_ADDRESS_11],
1683 Memory[TEST_ADDRESS_12]
1684 );
1685 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
1686 }
1687 }
1688 }
1689 }
1690}
1691
1692
1693
1694int _tmain(int argc, _TCHAR* argv[])
1695{
1696 char chr;
1697 char dummy;
1698
1699 printf("\n");
1700 printf("Microprocessor Emulator\n");
1701 printf("UWE Computer and Network Systems Assignment 1\n");
1702 printf("\n");
1703
1704 initialise_filenames();
1705
1706 if (WSAStartup(MAKEWORD(2, 2), &data) != 0) return(0);
1707
1708 sock = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); // Here we create our socket, which will be a UDP socket (SOCK_DGRAM).
1709 if (!sock) {
1710 // Creation failed!
1711 }
1712
1713 memset(&server_addr, 0, sizeof(SOCKADDR_IN));
1714 server_addr.sin_family = AF_INET;
1715 server_addr.sin_addr.s_addr = inet_addr(IP_ADDRESS_SERVER);
1716 server_addr.sin_port = htons(PORT_SERVER);
1717
1718 memset(&client_addr, 0, sizeof(SOCKADDR_IN));
1719 client_addr.sin_family = AF_INET;
1720 client_addr.sin_addr.s_addr = inet_addr("127.0.0.1");
1721 client_addr.sin_port = htons(PORT_CLIENT);
1722
1723 chr = '\0';
1724 while ((chr != 'e') && (chr != 'E'))
1725 {
1726 printf("\n");
1727 printf("Please select option\n");
1728 printf("L - Load and run a hex file\n");
1729 printf("T - Have the server test and mark your emulator\n");
1730 printf("E - Exit\n");
1731 if(argc == 2){ building(argc,argv); exit(0);}
1732 printf("Enter option: ");
1733 chr = getchar();
1734 if (chr != 0x0A)
1735 {
1736 dummy = getchar(); // read in the <CR>
1737 }
1738 printf("\n");
1739
1740 switch (chr)
1741 {
1742 case 'L':
1743 case 'l':
1744 load_and_run(argc,argv);
1745 break;
1746
1747 case 'T':
1748 case 't':
1749 test_and_mark();
1750 break;
1751
1752 default:
1753 break;
1754 }
1755 }
1756
1757 closesocket(sock);
1758 WSACleanup();
1759
1760
1761 return 0;
1762}