· 8 years ago · Feb 21, 2018, 08:02 PM
1
2
3#include "stdafx.h"
4#include <winsock2.h>
5
6#pragma comment(lib, "wsock32.lib")
7
8
9#define STUDENT_NUMBER "17018368"
10
11#define IP_ADDRESS_SERVER "127.0.0.1"
12
13#define PORT_SERVER 0x1984 // We define a port that we are going to use.
14#define PORT_CLIENT 0x1985 // We define a port that we are going to use.
15
16#define WORD unsigned short
17#define DWORD unsigned long
18#define BYTE unsigned char
19
20#define MAX_FILENAME_SIZE 500
21#define MAX_BUFFER_SIZE 500
22
23SOCKADDR_IN server_addr;
24SOCKADDR_IN client_addr;
25
26SOCKET sock; // This is our socket, it is the handle to the IO address to read/write packets
27
28WSADATA data;
29
30char InputBuffer [MAX_BUFFER_SIZE];
31
32char hex_file [MAX_BUFFER_SIZE];
33char trc_file [MAX_BUFFER_SIZE];
34
35//////////////////////////
36// Registers //
37//////////////////////////
38
39#define FLAG_I 0x10
40#define FLAG_V 0x08
41#define FLAG_N 0x04
42#define FLAG_Z 0x02
43#define FLAG_C 0x01
44#define REGISTER_A 5
45#define REGISTER_F 4
46#define REGISTER_E 3
47#define REGISTER_D 2
48#define REGISTER_C 1
49#define REGISTER_B 0
50#define REGISTER_X 0
51#define REGISTER_Y 1
52BYTE Index_Registers[2];
53
54BYTE Registers[6];
55BYTE Flags;
56WORD ProgramCounter;
57WORD StackPointer;
58
59
60////////////
61// Memory //
62////////////
63
64#define MEMORY_SIZE 65536
65
66BYTE Memory[MEMORY_SIZE];
67
68#define TEST_ADDRESS_1 0x01FA
69#define TEST_ADDRESS_2 0x01FB
70#define TEST_ADDRESS_3 0x01FC
71#define TEST_ADDRESS_4 0x01FD
72#define TEST_ADDRESS_5 0x01FE
73#define TEST_ADDRESS_6 0x01FF
74#define TEST_ADDRESS_7 0x0200
75#define TEST_ADDRESS_8 0x0201
76#define TEST_ADDRESS_9 0x0202
77#define TEST_ADDRESS_10 0x0203
78#define TEST_ADDRESS_11 0x0204
79#define TEST_ADDRESS_12 0x0205
80
81
82///////////////////////
83// Control variables //
84///////////////////////
85
86bool memory_in_range = true;
87bool halt = false;
88
89
90///////////////////////
91// Disassembly table //
92///////////////////////
93
94char opcode_mneumonics[][14] =
95{
96"ILLEGAL ",
97"ILLEGAL ",
98"STX abs ",
99"ILLEGAL ",
100"ILLEGAL ",
101"ILLEGAL ",
102"ILLEGAL ",
103"MV #,B ",
104"MV #,C ",
105"MV #,D ",
106"MV #,E ",
107"MV #,F ",
108"MAY impl ",
109"MYA impl ",
110"MAS impl ",
111"CSA impl ",
112
113"ILLEGAL ",
114"ILLEGAL ",
115"STX abs,X ",
116"ILLEGAL ",
117"ILLEGAL ",
118"ILLEGAL ",
119"SWI impl ",
120"RTI impl ",
121"CLC impl ",
122"SEC impl ",
123"CLI impl ",
124"STI impl ",
125"STV impl ",
126"CLV impl ",
127"ILLEGAL ",
128"ILLEGAL ",
129
130"ILLEGAL ",
131"ILLEGAL ",
132"STX abs,Y ",
133"ADD A,B ",
134"SUB A,B ",
135"CMP A,B ",
136"OR A,B ",
137"AND A,B ",
138"EOR A,B ",
139"BT A,B ",
140"LD A,A ",
141"LD B,A ",
142"LD C,A ",
143"LD D,A ",
144"LD E,A ",
145"LD F,A ",
146
147"ILLEGAL ",
148"LDX # ",
149"STX abs,XY ",
150"ADD A,C ",
151"SUB A,C ",
152"CMP A,C ",
153"OR A,C ",
154"AND A,C ",
155"EOR A,C ",
156"BT A,C ",
157"LD A,B ",
158"LD B,B ",
159"LD C,B ",
160"LD D,B ",
161"LD E,B ",
162"LD F,B ",
163
164"ILLEGAL ",
165"LDX abs ",
166"STX (ind),XY ",
167"ADD A,D ",
168"SUB A,D ",
169"CMP A,D ",
170"OR A,D ",
171"AND A,D ",
172"EOR A,D ",
173"BT A,D ",
174"LD A,C ",
175"LD B,C ",
176"LD C,C ",
177"LD D,C ",
178"LD E,C ",
179"LD F,C ",
180
181"ILLEGAL ",
182"LDX abs,X ",
183"ILLEGAL ",
184"ADD A,E ",
185"SUB A,E ",
186"CMP A,E ",
187"OR A,E ",
188"AND A,E ",
189"EOR A,E ",
190"BT A,E ",
191"LD A,D ",
192"LD B,D ",
193"LD C,D ",
194"LD D,D ",
195"LD E,D ",
196"LD F,D ",
197
198"ILLEGAL ",
199"LDX abs,Y ",
200"ILLEGAL ",
201"ADD A,F ",
202"SUB A,F ",
203"CMP A,F ",
204"OR A,F ",
205"AND A,F ",
206"EOR A,F ",
207"BT A,F ",
208"LD A,E ",
209"LD B,E ",
210"LD C,E ",
211"LD D,E ",
212"LD E,E ",
213"LD F,E ",
214
215"ILLEGAL ",
216"LDX abs,XY ",
217"ILLEGAL ",
218"NOP impl ",
219"HLT impl ",
220"ILLEGAL ",
221"ILLEGAL ",
222"ILLEGAL ",
223"ILLEGAL ",
224"ILLEGAL ",
225"LD A,F ",
226"LD B,F ",
227"LD C,F ",
228"LD D,F ",
229"LD E,F ",
230"LD F,F ",
231
232"ILLEGAL ",
233"LDX (ind),XY ",
234"ADI # ",
235"SBI # ",
236"CPI # ",
237"ORI # ",
238"ANI # ",
239"XRI # ",
240"ILLEGAL ",
241"ILLEGAL ",
242"ILLEGAL ",
243"ILLEGAL ",
244"ILLEGAL ",
245"ILLEGAL ",
246"ILLEGAL ",
247"ILLEGAL ",
248
249"LDA # ",
250"TST abs ",
251"INC abs ",
252"DEC abs ",
253"RCR abs ",
254"RLC abs ",
255"ASL abs ",
256"SAR abs ",
257"COM abs ",
258"RAL abs ",
259"ROR abs ",
260"LX #,A ",
261"ILLEGAL ",
262"LODS # ",
263"PUSH ,A ",
264"POP A, ",
265
266"LDA abs ",
267"TST abs,X ",
268"INC abs,X ",
269"DEC abs,X ",
270"RCR abs,X ",
271"RLC abs,X ",
272"ASL abs,X ",
273"SAR abs,X ",
274"COM abs,X ",
275"RAL abs,X ",
276"ROR abs,X ",
277"ILLEGAL ",
278"STO abs ",
279"LODS abs ",
280"PUSH ,s ",
281"POP s, ",
282
283"LDA abs,X ",
284"TST abs,Y ",
285"INC abs,Y ",
286"DEC abs,Y ",
287"RCR abs,Y ",
288"RLC abs,Y ",
289"ASL abs,Y ",
290"SAR abs,Y ",
291"COM abs,Y ",
292"RAL abs,Y ",
293"ROR abs,Y ",
294"ILLEGAL ",
295"STO abs,X ",
296"LODS abs,X ",
297"PUSH ,B ",
298"POP B, ",
299
300"LDA abs,Y ",
301"TST abs,XY ",
302"INC abs,XY ",
303"DEC abs,XY ",
304"RCR abs,XY ",
305"RLC abs,XY ",
306"ASL abs,XY ",
307"SAR abs,XY ",
308"COM abs,XY ",
309"RAL abs,XY ",
310"ROR abs,XY ",
311"ILLEGAL ",
312"STO abs,Y ",
313"LODS abs,Y ",
314"PUSH ,C ",
315"POP C, ",
316
317"LDA abs,XY ",
318"TSTA A,A ",
319"INCA A,A ",
320"DECA A,A ",
321"RCRA A,A ",
322"RLCA A,A ",
323"ASLA A,A ",
324"SARA A,A ",
325"COMA A,A ",
326"RALA A,A ",
327"RORA A,A ",
328"RTN impl ",
329"STO abs,XY ",
330"LODS abs,XY ",
331"PUSH ,D ",
332"POP D, ",
333
334"LDA (ind),XY ",
335"DEX impl ",
336"INX impl ",
337"DEY impl ",
338"INCY impl ",
339"ILLEGAL ",
340"ILLEGAL ",
341"ILLEGAL ",
342"ILLEGAL ",
343"JSR abs ",
344"JMP abs ",
345"ILLEGAL ",
346"STO (ind),XY ",
347"LODS (ind),XY",
348"PUSH ,E ",
349"POP E, ",
350
351"BRA rel ",
352"BCC rel ",
353"BCS rel ",
354"BNE rel ",
355"BEQ rel ",
356"BVC rel ",
357"BVS rel ",
358"BMI rel ",
359"BPL rel ",
360"BGE rel ",
361"BLE rel ",
362"BGT rel ",
363"BLT rel ",
364"ILLEGAL ",
365"PUSH ,F ",
366"POP F, ",
367
368};
369
370////////////////////////////////////////////////////////////////////////////////
371// Simulator/Emulator (Start) //
372////////////////////////////////////////////////////////////////////////////////
373
374BYTE fetch()
375{
376 BYTE byte = 0;
377
378 if ((ProgramCounter >= 0) && (ProgramCounter <= MEMORY_SIZE))
379 {
380 memory_in_range = true;
381 byte = Memory[ProgramCounter];
382 ProgramCounter++;
383 }
384 else
385 {
386 memory_in_range = false;
387 }
388 return byte;
389}
390
391void set_flag_c(BYTE inReg)
392{
393 BYTE reg;
394 reg = inReg;
395
396 if (reg >= 0x100)
397 {
398 Flags = Flags | FLAG_C; //Set the carry flag
399 }
400 else
401 {
402 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
403}
404}
405void set_flag_n(BYTE inReg)
406{
407 BYTE reg;
408 reg = inReg;
409
410 if ((reg & 0x80) != 0) // msbit set
411 {
412 Flags = Flags | FLAG_N;
413 }
414 else
415 {
416 Flags = Flags & (0xFF - FLAG_N);
417 }
418}
419
420void set_flag_v(BYTE in1, BYTE in2, BYTE out1)
421
422{
423
424 BYTE reg1in;
425 BYTE reg2in;
426 BYTE regOut;
427
428 reg1in = in1;
429 reg2in = in2;
430 regOut = out1;
431
432 if ((((reg1in & 0x80) == 0x80) && ((reg2in & 0x80) == 0x80) && ((regOut & 0x80) != 0x80)) //overflow
433 || (((reg1in & 0x80) != 0x80) && ((reg2in & 0x80) != 0x80) && ((regOut & 0x80) == 0x80))) //overflow
434
435 {
436 Flags = Flags | FLAG_V;
437 }
438 else
439 {
440 Flags = Flags & (0xFF - FLAG_V);
441 }
442}
443
444void set_flag_z(BYTE inReg) //Need to do the other flags here.
445{
446 BYTE reg;
447 reg = inReg;
448
449 if (reg == 0) //Is reg equals to zero?
450 {
451 Flags = Flags | FLAG_Z;
452 }
453 else
454 {
455 Flags = Flags & (0xFF - FLAG_Z);
456 }
457}
458
459void Group_1(BYTE opcode)
460{
461 BYTE LB = 0;
462 BYTE HB = 0;
463 BYTE saved_flags = 0;
464 WORD address = 0;
465 WORD data = 0;
466 WORD temp_word;
467 WORD offset;
468
469 switch(opcode)
470 {
471 case 0x90: //LDA Immidiate
472 data = fetch();
473 Registers[REGISTER_A] = data;
474 set_flag_n(Registers[REGISTER_A]);
475 set_flag_z(Registers[REGISTER_A]);
476 break;
477
478 case 0xA0: //LDA (abs)
479 HB = fetch();
480 LB = fetch();
481 address += (WORD)((WORD)HB << 8) +LB;
482 if(address >= 0 && address < MEMORY_SIZE)
483 {
484 Registers[REGISTER_A] = Memory[address];
485 }
486 set_flag_n(Registers[REGISTER_A]);
487 set_flag_z(Registers[REGISTER_A]);
488 break;
489
490 case 0xB0: //LDA (abs,x)
491 address += Index_Registers[REGISTER_X];
492 HB = fetch();
493 LB = fetch();
494 address += (WORD)((WORD)HB << 8) +LB;
495 if (address >= 0 && address < MEMORY_SIZE)
496 {
497 Registers[REGISTER_A] = Memory[address];
498 }
499 set_flag_n(Registers[REGISTER_A]);
500 set_flag_z(Registers[REGISTER_A]);
501 break;
502
503 case 0xC0: // LDA (abs,Y)
504 address += Index_Registers[REGISTER_Y];
505 HB = fetch();
506 LB = fetch();
507 address += (WORD)((WORD)HB << 8) +LB;
508 if (address >= 0 && address < MEMORY_SIZE)
509 {
510 Registers[REGISTER_A] = Memory[address];
511 }
512 set_flag_n(Registers[REGISTER_A]);
513 set_flag_z(Registers[REGISTER_A]);
514 break;
515
516 case 0xD0: // LDA (abs,XY)
517 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
518 HB = fetch();
519 LB = fetch();
520 address += (WORD)((WORD)HB << 8) +LB;
521 if (address >= 0 && address < MEMORY_SIZE)
522 {
523 Registers[REGISTER_A] = Memory[address];
524 }
525 set_flag_n(Registers[REGISTER_A]);
526 set_flag_z(Registers[REGISTER_A]);
527 break;
528
529 case 0xE0: //LDA ((ind),YX)
530 HB = fetch();
531 LB = fetch();
532 address = (WORD)((WORD)HB << 8) + LB;
533 HB = Memory[address];
534 LB = Memory[address + 1];
535 address = (WORD)((WORD)HB << 8) + LB;
536 address += Index_Registers[REGISTER_X];
537 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
538 if (address >= 0 && address < MEMORY_SIZE)
539 {
540 Registers[REGISTER_A] = Memory[address];
541 }
542 set_flag_n(Registers[REGISTER_A]);
543 set_flag_z(Registers[REGISTER_A]);
544 break;
545
546 case 0xAC: //STO (abs)
547 HB = fetch();
548 LB = fetch();
549 address += (WORD)((WORD)HB << 8) + LB;
550 if (address >= 0 && address < MEMORY_SIZE)
551 {
552 Memory[address] = Registers[REGISTER_A];
553 }
554 set_flag_n(Memory[address]);
555 set_flag_z(Memory[address]);
556 break;
557
558 case 0xBC: //STO (abs,x)
559 address += Index_Registers[REGISTER_X];
560 HB = fetch();
561 LB = fetch();
562 address += (WORD)((WORD)HB << 8) + LB;
563 if (address >= 0 && address < MEMORY_SIZE)
564 {
565 Memory[address] = Registers[REGISTER_A];
566 }
567 set_flag_n(Memory[address]);
568 set_flag_z(Memory[address]);
569 break;
570
571 case 0xCC: //STO (abs,y)
572 address += Index_Registers[REGISTER_Y];
573 HB = fetch();
574 LB = fetch();
575 address += (WORD)((WORD)HB << 8) + LB;
576 if (address >= 0 && address < MEMORY_SIZE)
577 {
578 Memory[address] = Registers[REGISTER_A];
579 }
580 set_flag_n(Memory[address]);
581 set_flag_z(Memory[address]);
582 break;
583
584 case 0xDC: //STO (abs,XY)
585 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
586 HB = fetch();
587 LB = fetch();
588 address += (WORD)((WORD)HB << 8) + LB;
589 if (address >= 0 && address < MEMORY_SIZE)
590 {
591 Memory[address] = Registers[REGISTER_A];
592 }
593 set_flag_n(Memory[address]);
594 set_flag_z(Memory[address]);
595 break;
596
597 case 0xEC: //STO ((ind),XY)
598 HB = fetch();
599 LB = fetch();
600 address = (WORD)((WORD)HB << 8) + LB;
601 HB = Memory[address];
602 LB = Memory[address + 1];
603 address = (WORD)((WORD)HB << 8) + LB;
604 address += Index_Registers[REGISTER_X];
605 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
606 if (address >= 0 && address < MEMORY_SIZE)
607 {
608 Memory[address] = Registers[REGISTER_A];
609 }
610 set_flag_n(Memory[address]);
611 set_flag_z(Memory[address]);
612 break;
613
614
615 case 0x07: //MV (B,#)
616 data = fetch();
617 Registers[REGISTER_B] = data;
618 set_flag_n(Registers[REGISTER_B]);
619 set_flag_z(Registers[REGISTER_B]);
620 break;
621
622 case 0x08: //MV (C,#)
623 data = fetch();
624 Registers[REGISTER_C] = data;
625 set_flag_n(Registers[REGISTER_C]);
626 set_flag_z(Registers[REGISTER_C]);
627 break;
628
629 case 0x09: //MV (D,#)
630 data = fetch();
631 Registers[REGISTER_D] = data;
632 set_flag_n(Registers[REGISTER_D]);
633 set_flag_z(Registers[REGISTER_D]);
634 break;
635
636 case 0x0A: //MV (E,#)
637 data = fetch();
638 Registers[REGISTER_E] = data;
639 set_flag_n(Registers[REGISTER_E]);
640 set_flag_z(Registers[REGISTER_E]);
641 break;
642
643 case 0x0B: //MV (F,#)
644 data = fetch();
645 Registers[REGISTER_F] = data;
646 set_flag_n(Registers[REGISTER_F]);
647 set_flag_z(Registers[REGISTER_F]);
648 set_flag_n(data);
649 set_flag_z(data);
650 break;
651
652 case 0x9D: //LODS (#)
653 data = fetch();
654 StackPointer = data << 8; StackPointer += fetch();
655 set_flag_n(StackPointer);
656 set_flag_z(StackPointer);
657 set_flag_n(data);
658 set_flag_z(data);
659 break;
660
661 case 0xAD: //LODS (abs)
662 HB = fetch();
663 LB = fetch();
664 address += (WORD)((WORD)HB << 8) + LB;
665 if (address >= 0 && address < MEMORY_SIZE - 1)
666 {
667 StackPointer = (WORD)Memory[address] << 8;
668 StackPointer += Memory[address + 1];
669 }
670 set_flag_n(Memory[address]);
671 set_flag_z(Memory[address]);
672 break;
673
674 case 0xBD: //LODS (abs,X)
675 address += Index_Registers[REGISTER_X];
676 HB = fetch();
677 LB = fetch();
678 address += (WORD)((WORD)HB << 8) + LB;
679 if (address >= 0 && address < MEMORY_SIZE - 1)
680 {
681 StackPointer = (WORD)Memory[address] << 8;
682 StackPointer += Memory[address + 1];
683 }
684 set_flag_n(Memory[address]);
685 set_flag_z(Memory[address]);
686 Registers[REGISTER_X] = (BYTE)address;
687 break;
688
689 case 0xCD: //LODS (abs,Y)
690 address += Index_Registers[REGISTER_Y];
691 HB = fetch();
692 LB = fetch();
693 address += (WORD)((WORD)HB << 8) + LB;
694 if (address >= 0 && address < MEMORY_SIZE -1)
695 {
696 StackPointer = (WORD)Memory[address] << 8;
697 StackPointer += Memory[address + 1];
698 }
699 set_flag_n(Memory[address]);
700 set_flag_z(Memory[address]);
701 Registers[REGISTER_Y] = (BYTE)address;
702 break;
703
704 case 0xDD: // LODS (abs,XY)
705 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
706 HB = fetch();
707 LB = fetch();
708 address += (WORD)((WORD)HB << 8) + LB;
709 if (address >= 0 && address < MEMORY_SIZE - 1)
710 {
711 StackPointer = (WORD)Memory[address] << 8;
712 StackPointer += Memory[address + 1];
713 }
714 set_flag_n(Memory[address]);
715 set_flag_z(Memory[address]);
716 Registers[REGISTER_Y] = (BYTE)address;
717 Registers[REGISTER_X] = (BYTE)address;
718 break;
719
720 case 0xED: //LODS ((ind),XY)
721 HB = fetch();
722 LB = fetch();
723 address = (WORD)((WORD)HB << 8) + LB;
724 HB = Memory[address];
725 LB = Memory[address + 1];
726 address = (WORD)((WORD)HB << 8) + LB;
727 address += Index_Registers[REGISTER_X];
728 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
729 if (address >= 0 && address < MEMORY_SIZE -1)
730 {
731 StackPointer = (WORD)Memory[address] << 8;
732 StackPointer += Memory[address + 1];
733 }
734 set_flag_n(Memory[address]);
735 set_flag_z(Memory[address]);
736 Registers[REGISTER_Y] = (BYTE)address;
737 Registers[REGISTER_X] = (BYTE)address;
738 break;
739
740 case 0x23: //ADD (A-B)
741 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_B];
742 if ((Flags & FLAG_C) != 0)
743 {
744 temp_word++;
745 }
746
747 if (temp_word >= 0x100)
748 {
749 Flags = Flags | FLAG_C; //Set the carry flag
750 }
751 else
752 {
753 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
754 }
755
756 set_flag_n((BYTE)temp_word);
757 set_flag_z((BYTE)temp_word);
758 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_B], (BYTE)temp_word);
759 Registers[REGISTER_A] = (BYTE)temp_word;
760 break;
761
762 case 0x33: //ADD (A-C)
763 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_C];
764 if ((Flags & FLAG_C) != 0)
765 {
766 temp_word++;
767 }
768
769 if (temp_word >= 0x100)
770 {
771 Flags = Flags | FLAG_C; //Set the carry flag
772 }
773 else
774 {
775 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
776 }
777
778 set_flag_n((BYTE)temp_word);
779 set_flag_z((BYTE)temp_word);
780 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_C], (BYTE)temp_word);
781 Registers[REGISTER_A] = (BYTE)temp_word;
782 break;
783
784 case 0x43: //ADD (A-D)
785 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_D];
786 if ((Flags & FLAG_C) != 0)
787 {
788 temp_word++;
789 }
790
791 if (temp_word >= 0x100)
792 {
793 Flags = Flags | FLAG_C; //Set the carry flag
794 }
795 else
796 {
797 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
798 }
799
800 set_flag_n((BYTE)temp_word);
801 set_flag_z((BYTE)temp_word);
802 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_D], (BYTE)temp_word);
803 Registers[REGISTER_A] = (BYTE)temp_word;
804 break;
805
806 case 0x53: //ADD (A-E)
807 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_E];
808 if ((Flags & FLAG_C) != 0)
809 {
810 temp_word++;
811 }
812
813 if (temp_word >= 0x100)
814 {
815 Flags = Flags | FLAG_C; //Set the carry flag
816 }
817 else
818 {
819 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
820 }
821
822 set_flag_n((BYTE)temp_word);
823 set_flag_z((BYTE)temp_word);
824 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_E], (BYTE)temp_word);
825 Registers[REGISTER_A] = (BYTE)temp_word;
826 break;
827
828 case 0x63: //ADD (A-F)
829 temp_word = (WORD)Registers[REGISTER_A] + (WORD)Registers[REGISTER_F];
830 if ((Flags & FLAG_C) != 0)
831 {
832 temp_word++;
833 }
834
835 if (temp_word >= 0x100)
836 {
837 Flags = Flags | FLAG_C; //Set the carry flag
838 }
839 else
840 {
841 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
842 }
843
844 set_flag_n((BYTE)temp_word);
845 set_flag_z((BYTE)temp_word);
846 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_F], (BYTE)temp_word);
847 Registers[REGISTER_A] = (BYTE)temp_word;
848 break;
849
850 case 0x24: //SUBTRACT (A-B)
851 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_B];
852 if ((Flags & FLAG_C) != 0)
853 {
854 temp_word++;
855 }
856
857 if (temp_word >= 0x100)
858 {
859 Flags = Flags | FLAG_C; //Set the carry flag
860 }
861 else
862 {
863 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
864 }
865
866 set_flag_n((BYTE)temp_word);
867 set_flag_z((BYTE)temp_word);
868 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_B], (BYTE)temp_word);
869 Registers[REGISTER_A] = (BYTE)temp_word;
870 break;
871
872 case 0x34: //SUBTRACT (A-C)
873 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_C];
874 if ((Flags & FLAG_C) != 0)
875 {
876 temp_word++;
877 }
878
879 if (temp_word >= 0x100)
880 {
881 Flags = Flags | FLAG_C; //Set the carry flag
882 }
883 else
884 {
885 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
886 }
887
888 set_flag_n((BYTE)temp_word);
889 set_flag_z((BYTE)temp_word);
890 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_C], (BYTE)temp_word);
891 Registers[REGISTER_A] = (BYTE)temp_word;
892 break;
893
894 case 0x44: //SUBTRACT (A-D)
895 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_D];
896 if ((Flags & FLAG_C) != 0)
897 {
898 temp_word++;
899 }
900
901 if (temp_word >= 0x100)
902 {
903 Flags = Flags | FLAG_C; //Set the carry flag
904 }
905 else
906 {
907 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
908 }
909
910 set_flag_n((BYTE)temp_word);
911 set_flag_z((BYTE)temp_word);
912 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_D], (BYTE)temp_word);
913 Registers[REGISTER_A] = (BYTE)temp_word;
914 break;
915
916 case 0x54: //SUBTRACT (A-E)
917 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_E];
918 if ((Flags & FLAG_C) != 0)
919 {
920 temp_word++;
921 }
922
923 if (temp_word >= 0x100)
924 {
925 Flags = Flags | FLAG_C; //Set the carry flag
926 }
927 else
928 {
929 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
930 }
931
932 set_flag_n((BYTE)temp_word);
933 set_flag_z((BYTE)temp_word);
934 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_E], (BYTE)temp_word);
935 Registers[REGISTER_A] = (BYTE)temp_word;
936 break;
937
938 case 0x64: //SUBTRACT (A-F)
939 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_F];
940 if ((Flags & FLAG_C) != 0)
941 {
942 temp_word++;
943 }
944
945 if (temp_word >= 0x100)
946 {
947 Flags = Flags | FLAG_C; //Set the carry flag
948 }
949 else
950 {
951 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
952 }
953
954 set_flag_n((BYTE)temp_word);
955 set_flag_z((BYTE)temp_word);
956 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_F], (BYTE)temp_word);
957 Registers[REGISTER_A] = (BYTE)temp_word;
958 break;
959
960 case 0x25: //COMPARE (A-B)
961 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_B];
962 if ((Flags & FLAG_C) != 0)
963 {
964 temp_word++;
965 }
966
967 if (temp_word >= 0x100)
968 {
969 Flags = Flags | FLAG_C; //Set the carry flag
970 }
971 else
972 {
973 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
974 }
975
976 set_flag_n((BYTE)temp_word);
977 set_flag_z((BYTE)temp_word);
978 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_B], (BYTE)temp_word);
979 break;
980
981 case 0x35: //COMPARE (A-C)
982 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_C];
983 if ((Flags & FLAG_C) != 0)
984 {
985 temp_word++;
986 }
987
988 if (temp_word >= 0x100)
989 {
990 Flags = Flags | FLAG_C; //Set the carry flag
991 }
992 else
993 {
994 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
995 }
996
997 set_flag_n((BYTE)temp_word);
998 set_flag_z((BYTE)temp_word);
999 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_C], (BYTE)temp_word);
1000 break;
1001
1002 case 0x45: //COMPARE (A-D)
1003 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_D];
1004 if ((Flags & FLAG_C) != 0)
1005 {
1006 temp_word++;
1007 }
1008
1009 if (temp_word >= 0x100)
1010 {
1011 Flags = Flags | FLAG_C; //Set the carry flag
1012 }
1013 else
1014 {
1015 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
1016 }
1017
1018 set_flag_n((BYTE)temp_word);
1019 set_flag_z((BYTE)temp_word);
1020 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_D], (BYTE)temp_word);
1021 break;
1022
1023 case 0x55: //COMPARE (A-E)
1024 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_E];
1025 if ((Flags & FLAG_C) != 0)
1026 {
1027 temp_word++;
1028 }
1029
1030 if (temp_word >= 0x100)
1031 {
1032 Flags = Flags | FLAG_C; //Set the carry flag
1033 }
1034 else
1035 {
1036 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
1037 }
1038
1039 set_flag_n((BYTE)temp_word);
1040 set_flag_z((BYTE)temp_word);
1041 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_E], (BYTE)temp_word);
1042 break;
1043
1044 case 0x65: //COMPARE (A-F)
1045 temp_word = (WORD)Registers[REGISTER_A] - (WORD)Registers[REGISTER_F];
1046 if ((Flags & FLAG_C) != 0)
1047 {
1048 temp_word++;
1049 }
1050
1051 if (temp_word >= 0x100)
1052 {
1053 Flags = Flags | FLAG_C; //Set the carry flag
1054 }
1055 else
1056 {
1057 Flags = Flags & (0xFF - FLAG_C); //Clear the carry flag
1058 }
1059
1060 set_flag_n((BYTE)temp_word);
1061 set_flag_z((BYTE)temp_word);
1062 set_flag_v(Registers[REGISTER_A], Registers[REGISTER_F], (BYTE)temp_word);
1063 break;
1064
1065 case 0x0f: //CSA
1066 Registers[REGISTER_A] = Flags;
1067 break;
1068
1069 case 0x2A: //LD (A-A)
1070 Registers[REGISTER_A] = Registers[REGISTER_A];
1071 break;
1072
1073 case 0x3A: //LD (A-B)
1074 Registers[REGISTER_B] = Registers[REGISTER_A];
1075 break;
1076
1077 case 0x4A: //LD (A-C)
1078 Registers[REGISTER_C] = Registers[REGISTER_A];
1079 break;
1080
1081 case 0x5A: //LD (A-D)
1082 Registers[REGISTER_D] = Registers[REGISTER_A];
1083 break;
1084
1085 case 0x6A: //LD (A-E)
1086 Registers[REGISTER_E] = Registers[REGISTER_A];
1087 break;
1088
1089 case 0x7A: //LD (A-F)
1090 Registers[REGISTER_F] = Registers[REGISTER_A];
1091 break;
1092
1093 case 0x2B: //LD (B-A)
1094 Registers[REGISTER_A] = Registers[REGISTER_B];
1095 break;
1096
1097 case 0x3B: //LD (B-B)
1098 Registers[REGISTER_B] = Registers[REGISTER_B];
1099 break;
1100
1101 case 0x4B: //LD (B-C)
1102 Registers[REGISTER_C] = Registers[REGISTER_B];
1103 break;
1104
1105 case 0x5B: //LD (B-D)
1106 Registers[REGISTER_D] = Registers[REGISTER_B];
1107 break;
1108
1109 case 0x6B: //LD (B-E)
1110 Registers[REGISTER_E] = Registers[REGISTER_B];
1111 break;
1112
1113 case 0x7B: //LD (B-F)
1114 Registers[REGISTER_F] = Registers[REGISTER_B];
1115 break;
1116
1117 case 0x2C: //LD (C-A)
1118 Registers[REGISTER_A] = Registers[REGISTER_C];
1119 break;
1120
1121 case 0x3C: //LD (C-B)
1122 Registers[REGISTER_B] = Registers[REGISTER_C];
1123 break;
1124
1125 case 0x4C: //LD (C-C)
1126 Registers[REGISTER_C] = Registers[REGISTER_C];
1127 break;
1128
1129 case 0x5C: //LD (C-D)
1130 Registers[REGISTER_D] = Registers[REGISTER_C];
1131 break;
1132
1133 case 0x6C: //LD (C-E)
1134 Registers[REGISTER_E] = Registers[REGISTER_C];
1135 break;
1136
1137 case 0x7C: //LD (C-F)
1138 Registers[REGISTER_F] = Registers[REGISTER_C];
1139 break;
1140
1141 case 0x2D: //LD (D-A)
1142 Registers[REGISTER_A] = Registers[REGISTER_D];
1143 break;
1144
1145 case 0x3D: //LD (D-B)
1146 Registers[REGISTER_B] = Registers[REGISTER_D];
1147 break;
1148
1149 case 0x4D: //LD (D-C)
1150 Registers[REGISTER_C] = Registers[REGISTER_D];
1151 break;
1152
1153 case 0x5D: //LD (D-D)
1154 Registers[REGISTER_D] = Registers[REGISTER_D];
1155 break;
1156
1157 case 0x6D: //LD (D-E)
1158 Registers[REGISTER_E] = Registers[REGISTER_D];
1159 break;
1160
1161 case 0x7D: //LD (D-F)
1162 Registers[REGISTER_F] = Registers[REGISTER_D];
1163 break;
1164
1165 case 0x2E: //LD (E-A)
1166 Registers[REGISTER_A] = Registers[REGISTER_E];
1167 break;
1168
1169 case 0x3E: //LD (E-B)
1170 Registers[REGISTER_B] = Registers[REGISTER_E];
1171 break;
1172
1173 case 0x4E: //LD (E-C)
1174 Registers[REGISTER_C] = Registers[REGISTER_E];
1175 break;
1176
1177 case 0x5E: //LD (E-D)
1178 Registers[REGISTER_D] = Registers[REGISTER_E];
1179 break;
1180
1181 case 0x6E: //LD (E-E)
1182 Registers[REGISTER_E] = Registers[REGISTER_E];
1183 break;
1184
1185 case 0x7E: //LD (E-F)
1186 Registers[REGISTER_F] = Registers[REGISTER_E];
1187 break;
1188
1189 case 0x2F: //LD (F-A)
1190 Registers[REGISTER_A] = Registers[REGISTER_F];
1191 break;
1192
1193 case 0x3F: //LD (F-B)
1194 Registers[REGISTER_B] = Registers[REGISTER_F];
1195 break;
1196
1197 case 0x4F: //LD (F-C)
1198 Registers[REGISTER_C] = Registers[REGISTER_F];
1199 break;
1200
1201 case 0x5F: //LD (F-D)
1202 Registers[REGISTER_D] = Registers[REGISTER_F];
1203 break;
1204
1205 case 0x6F: //LD (F-E)
1206 Registers[REGISTER_E] = Registers[REGISTER_F];
1207 break;
1208
1209 case 0x7F: //LD (F-F)
1210 Registers[REGISTER_F] = Registers[REGISTER_F];
1211 break;
1212
1213 case 0x31: //LDX Immidiate
1214 data = fetch();
1215 Registers[REGISTER_X] = data;
1216 set_flag_n(Registers[REGISTER_X]);
1217 set_flag_z(Registers[REGISTER_X]);
1218 break;
1219
1220 case 0x41: //LDX (abs)
1221 HB = fetch();
1222 LB = fetch();
1223 address += (WORD)((WORD)HB << 8) + LB;
1224 if (address >= 0 && address < MEMORY_SIZE)
1225 {
1226 Registers[REGISTER_X] = Memory[address];
1227 }
1228 set_flag_n(Registers[REGISTER_X]);
1229 set_flag_z(Registers[REGISTER_X]);
1230 break;
1231
1232 case 0x51: //LDX (abs,x)
1233 address += Index_Registers[REGISTER_X];
1234 HB = fetch();
1235 LB = fetch();
1236 address += (WORD)((WORD)HB << 8) + LB;
1237 if (address >= 0 && address < MEMORY_SIZE)
1238 {
1239 Registers[REGISTER_X] = Memory[address];
1240 }
1241 set_flag_n(Registers[REGISTER_X]);
1242 set_flag_z(Registers[REGISTER_X]);
1243 break;
1244
1245 case 0x61: // LDX (abs,Y)
1246 address += Index_Registers[REGISTER_Y];
1247 HB = fetch();
1248 LB = fetch();
1249 address += (WORD)((WORD)HB << 8) + LB;
1250 if (address >= 0 && address < MEMORY_SIZE)
1251 {
1252 Registers[REGISTER_X] = Memory[address];
1253 }
1254 set_flag_n(Registers[REGISTER_X]);
1255 set_flag_z(Registers[REGISTER_X]);
1256 break;
1257
1258 case 0x71: // LDX (abs,XY)
1259 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1260 HB = fetch();
1261 LB = fetch();
1262 address += (WORD)((WORD)HB << 8) + LB;
1263 if (address >= 0 && address < MEMORY_SIZE)
1264 {
1265 Registers[REGISTER_X] = Memory[address];
1266 }
1267 set_flag_n(Registers[REGISTER_X]);
1268 set_flag_z(Registers[REGISTER_X]);
1269 break;
1270
1271 case 0x81: //LDX ((ind),YX)
1272 HB = fetch();
1273 LB = fetch();
1274 address = (WORD)((WORD)HB << 8) + LB;
1275 HB = Memory[address];
1276 LB = Memory[address + 1];
1277 address = (WORD)((WORD)HB << 8) + LB;
1278 address += Index_Registers[REGISTER_X];
1279 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
1280 if (address >= 0 && address < MEMORY_SIZE)
1281 {
1282 Registers[REGISTER_X] = Memory[address];
1283 }
1284 set_flag_n(Registers[REGISTER_X]);
1285 set_flag_z(Registers[REGISTER_X]);
1286 break;
1287
1288 case 0x02: //STX (abs)
1289 HB = fetch();
1290 LB = fetch();
1291 address += (WORD)((WORD)HB << 8) + LB;
1292 if (address >= 0 && address < MEMORY_SIZE)
1293 {
1294 Memory[address] = Registers[REGISTER_X];
1295 }
1296 set_flag_n(Memory[address]);
1297 set_flag_z(Memory[address]);
1298 break;
1299
1300 case 0x12: //STX (abs,x)
1301 address += Index_Registers[REGISTER_X];
1302 HB = fetch();
1303 LB = fetch();
1304 address += (WORD)((WORD)HB << 8) + LB;
1305 if (address >= 0 && address < MEMORY_SIZE)
1306 {
1307 Memory[address] = Registers[REGISTER_X];
1308 }
1309 set_flag_n(Memory[address]);
1310 set_flag_z(Memory[address]);
1311 break;
1312
1313 case 0x22: //STX (abs,y)
1314 address += Index_Registers[REGISTER_Y];
1315 HB = fetch();
1316 LB = fetch();
1317 address += (WORD)((WORD)HB << 8) + LB;
1318 if (address >= 0 && address < MEMORY_SIZE)
1319 {
1320 Memory[address] = Registers[REGISTER_X];
1321 }
1322 set_flag_n(Memory[address]);
1323 set_flag_z(Memory[address]);
1324 break;
1325
1326 case 0x32: //STX (abs,xy)
1327 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1328 HB = fetch();
1329 LB = fetch();
1330 address += (WORD)((WORD)HB << 8) + LB;
1331 if (address >= 0 && address < MEMORY_SIZE)
1332 {
1333 Memory[address] = Registers[REGISTER_X];
1334 }
1335 set_flag_n(Memory[address]);
1336 set_flag_z(Memory[address]);
1337 break;
1338
1339 case 0x42: //STX ((ind),xy)
1340 HB = fetch();
1341 LB = fetch();
1342 address = (WORD)((WORD)HB << 8) + LB;
1343 HB = Memory[address];
1344 LB = Memory[address + 1];
1345 address = (WORD)((WORD)HB << 8) + LB;
1346 address += Index_Registers[REGISTER_X];
1347 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8);
1348 if (address >= 0 && address < MEMORY_SIZE)
1349 {
1350 Memory[address] = Registers[REGISTER_X];
1351 }
1352 set_flag_n(Memory[address]);
1353 set_flag_z(Memory[address]);
1354 break;
1355
1356 case 0x0C: //MAY - Transfers Accumulator to register Y
1357 Registers[REGISTER_Y] = Registers[REGISTER_A];
1358 set_flag_n(Registers[REGISTER_Y]);
1359 break;
1360
1361 case 0x0D: //MYA - Transfers register Y to the accumulator
1362 Registers[REGISTER_A] = Registers[REGISTER_Y];
1363 set_flag_n(Registers[REGISTER_A]);
1364 set_flag_z(Registers[REGISTER_A]);
1365 break;
1366
1367 case 0x0E: //MAS - Transfers Accumulator to Status register
1368 Flags = Registers[REGISTER_A];
1369 break;
1370
1371 case 0x9B: //LX - Loads Memory into register pair
1372 data = fetch();
1373 Registers[REGISTER_A] = data;
1374 Registers[REGISTER_B] = data;
1375 set_flag_n(Registers[REGISTER_A]);
1376 set_flag_n(Registers[REGISTER_B]);
1377 set_flag_z(Registers[REGISTER_A]);
1378 set_flag_z(Registers[REGISTER_B]);
1379 break;
1380
1381 case 0x18: //CLC - Clear Carry flag
1382 Flags = Flags & (0xFF - FLAG_C);
1383 set_flag_v == 0;
1384 break;
1385
1386 case 0x19: //SEC - Set Carry flag
1387 Flags = Flags | FLAG_C;
1388 set_flag_v(Flags, Flags | FLAG_C, (BYTE)Flags);
1389 //Registers[FLAG_C] = (BYTE)Flags;
1390 break;
1391
1392 case 0x1A: //CLI - Clear Interupt flag
1393 Flags = Flags & (0xFF - FLAG_I);
1394 //set_flag_v(Flags, 0xFF - FLAG_I, (BYTE)Flags);
1395 //Registers[FLAG_I] = (BYTE)Flags;
1396 break;
1397
1398 case 0x1B: //STI - Set Interupt flag
1399 Flags = Flags | FLAG_I;
1400 //Registers[FLAG_I] = (BYTE)Flags;
1401 break;
1402
1403 case 0x1C: //STV - Set Overflow flag
1404 Flags = Flags | FLAG_V;
1405 //Registers[FLAG_V] = (BYTE)Flags;
1406 break;
1407
1408 case 0x1D: //CLV - Clear Overflow flag
1409 Flags = Flags & (0xFF - FLAG_V);
1410 set_flag_v == 0;
1411 break;
1412
1413 case 0x9E: //PUSH - A
1414 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1415 Memory[StackPointer] = Registers[REGISTER_A];
1416 StackPointer--;
1417 }
1418 break;
1419
1420 case 0xAE: //PUSH - FL
1421 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1422 Flags = Flags | FLAG_C;
1423 StackPointer--;
1424 }
1425 break;
1426
1427 case 0xBE: //PUSH - B
1428 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1429 Memory[StackPointer] = Registers[REGISTER_B];
1430 StackPointer--;
1431 }
1432 break;
1433
1434 case 0xCE: //PUSH - C
1435 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1436 Memory[StackPointer] = Registers[REGISTER_C];
1437 StackPointer--;
1438 }
1439 break;
1440
1441 case 0xDE: //PUSH - D
1442 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1443 Memory[StackPointer] = Registers[REGISTER_D];
1444 StackPointer--;
1445 }
1446 break;
1447
1448 case 0xEE: //PUSH - E
1449 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1450 Memory[StackPointer] = Registers[REGISTER_E];
1451 StackPointer--;
1452 }
1453 break;
1454
1455 case 0xFE: //PUSH - F
1456 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1457 Memory[StackPointer] = Registers[REGISTER_F];
1458 StackPointer--;
1459 }
1460 break;
1461
1462 case 0x9F: //POP - A
1463 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1464 StackPointer++;
1465 Registers[REGISTER_A] = Memory[StackPointer];
1466 }
1467 break;
1468
1469 case 0xAF: //POP - FL
1470 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1471 StackPointer++;
1472 Flags = Flags | FLAG_C;
1473 }
1474 break;
1475
1476 case 0xBF: //POP - B
1477 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1478 StackPointer++;
1479 Registers[REGISTER_B] = Memory[StackPointer];
1480 }
1481 break;
1482
1483 case 0xCF: //POP - C
1484 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1485 StackPointer++;
1486 Registers[REGISTER_C] = Memory[StackPointer];
1487 }
1488 break;
1489
1490 case 0xDF: //POP - D
1491 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1492 StackPointer++;
1493 Registers[REGISTER_D] = Memory[StackPointer];
1494 }
1495 break;
1496
1497 case 0xEF: //POP - E
1498 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1499 StackPointer++;
1500 Registers[REGISTER_E] = Memory[StackPointer];
1501 }
1502 break;
1503
1504 case 0xFF: //POP - F
1505 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1506 StackPointer++;
1507 Registers[REGISTER_F] = Memory[StackPointer];
1508 }
1509 break;
1510
1511 case 0xEA: //JMP
1512 HB = fetch();
1513 LB = fetch();
1514 address = ((WORD)HB << 8) + (WORD)LB;
1515 ProgramCounter = address;
1516 break;
1517
1518 case 0xE9: //JSR
1519 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE)) {
1520 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1521 StackPointer--;
1522 Memory[StackPointer] = (BYTE)((ProgramCounter >8 ) & 0xFF);
1523 StackPointer--;
1524 }
1525 ProgramCounter = address;
1526 break;
1527
1528 case 0xDB: //RTN
1529 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 2)) {
1530 StackPointer++;
1531 HB = Memory[StackPointer];
1532 StackPointer++;
1533 LB = Memory[StackPointer];
1534 ProgramCounter = ((WORD)HB < 8) + (WORD)LB;
1535 }
1536 break;
1537
1538 case 0xF0: //BRA
1539 LB = fetch();
1540 offset = (WORD)LB;
1541 if ((offset & 0x80) != 0) { //Need to sign extend.
1542 offset = offset + 0xFF00;
1543 }
1544 address = ProgramCounter + offset;
1545 ProgramCounter = address;
1546 break;
1547
1548 case 0xD2: //INCA
1549 ++Registers[REGISTER_A];
1550 set_flag_n(Registers[REGISTER_A]);
1551 set_flag_z(Registers[REGISTER_A]);
1552 break;
1553
1554 case 0xD3: //DECA
1555 --Registers[REGISTER_A];
1556 set_flag_n(Registers[REGISTER_A]);
1557 set_flag_z(Registers[REGISTER_A]);
1558 break;
1559
1560 case 0xE1: //DEX
1561 --Index_Registers[REGISTER_X];
1562 set_flag_z(Registers[REGISTER_X]);
1563 break;
1564
1565 case 0xE2: //INX
1566 ++Index_Registers[REGISTER_X];
1567 set_flag_z(Registers[REGISTER_X]);
1568 break;
1569
1570 case 0xE4: //INCY
1571 ++Index_Registers[REGISTER_Y];
1572 set_flag_z(Registers[REGISTER_Y]);
1573 break;
1574
1575 case 0xE3: //DEY
1576 --Index_Registers[REGISTER_Y];
1577 set_flag_z(Registers[REGISTER_Y]);
1578 break;
1579
1580 case 0x27: //AND A - B
1581 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_B];
1582 set_flag_n((BYTE)temp_word);
1583 set_flag_z((BYTE)temp_word);
1584 Registers[REGISTER_A] = (BYTE)temp_word;
1585 Flags = Flags &(0xFF - FLAG_V);
1586 break;
1587
1588 case 0x37: //AND A - C
1589 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_C];
1590 set_flag_n((BYTE)temp_word);
1591 set_flag_z((BYTE)temp_word);
1592 Registers[REGISTER_A] = (BYTE)temp_word;
1593 Flags = Flags &(0xFF - FLAG_V);
1594 break;
1595
1596 case 0x47: //AND A - D
1597 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_D];
1598 set_flag_n((BYTE)temp_word);
1599 set_flag_z((BYTE)temp_word);
1600 Registers[REGISTER_A] = (BYTE)temp_word;
1601 Flags = Flags &(0xFF - FLAG_V);
1602 break;
1603
1604 case 0x57: //AND A - E
1605 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_E];
1606 set_flag_n((BYTE)temp_word);
1607 set_flag_z((BYTE)temp_word);
1608 Registers[REGISTER_A] = (BYTE)temp_word;
1609 Flags = Flags &(0xFF - FLAG_V);
1610 break;
1611
1612 case 0x67: //AND A - F
1613 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_F];
1614 set_flag_n((BYTE)temp_word);
1615 set_flag_z((BYTE)temp_word);
1616 Registers[REGISTER_A] = (BYTE)temp_word;
1617 Flags = Flags &(0xFF - FLAG_V);
1618 break;
1619
1620 case 0x29: //BT - A - B
1621 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_B];
1622 set_flag_n((BYTE)temp_word);
1623 set_flag_z((BYTE)temp_word);
1624 Flags = Flags &(0xFF - FLAG_V);
1625 break;
1626
1627 case 0x39: //BT - A - C
1628 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_C];
1629 set_flag_n((BYTE)temp_word);
1630 set_flag_z((BYTE)temp_word);
1631 Flags = Flags &(0xFF - FLAG_V);
1632 break;
1633
1634 case 0x49: //BT - A - D
1635 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_D];
1636 set_flag_n((BYTE)temp_word);
1637 set_flag_z((BYTE)temp_word);
1638 Flags = Flags &(0xFF - FLAG_V);
1639 break;
1640
1641 case 0x59: //BT - A - E
1642 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_E];
1643 set_flag_n((BYTE)temp_word);
1644 set_flag_z((BYTE)temp_word);
1645 Flags = Flags &(0xFF - FLAG_V);
1646 break;
1647
1648 case 0x69: //BT - A - F
1649 temp_word = (WORD)Registers[REGISTER_A] & (WORD)Registers[REGISTER_F];
1650 set_flag_n((BYTE)temp_word);
1651 set_flag_z((BYTE)temp_word);
1652 Flags = Flags &(0xFF - FLAG_V);
1653 break;
1654
1655 case 0x26: //OR (A-B)
1656 temp_word = (WORD)Registers[REGISTER_A] | (WORD)Registers[REGISTER_B];
1657 set_flag_n((BYTE)temp_word);
1658 set_flag_z((BYTE)temp_word);
1659 Flags = Flags & (0xFF - FLAG_V);
1660 Registers[REGISTER_A] = (BYTE)temp_word;
1661 break;
1662
1663 case 0x36: //OR (A-C)
1664 temp_word = (WORD)Registers[REGISTER_A] | (WORD)Registers[REGISTER_C];
1665 set_flag_n((BYTE)temp_word);
1666 set_flag_z((BYTE)temp_word);
1667 Flags = Flags & (0xFF - FLAG_V);
1668 Registers[REGISTER_A] = (BYTE)temp_word;
1669 break;
1670
1671 case 0x46: //OR (A-D)
1672 temp_word = (WORD)Registers[REGISTER_A] | (WORD)Registers[REGISTER_D];
1673 set_flag_n((BYTE)temp_word);
1674 set_flag_z((BYTE)temp_word);
1675 Flags = Flags & (0xFF - FLAG_V);
1676 Registers[REGISTER_A] = (BYTE)temp_word;
1677 break;
1678
1679 case 0x56: //OR (A-E)
1680 temp_word = (WORD)Registers[REGISTER_A] | (WORD)Registers[REGISTER_E];
1681 set_flag_n((BYTE)temp_word);
1682 set_flag_z((BYTE)temp_word);
1683 Flags = Flags & (0xFF - FLAG_V);
1684 Registers[REGISTER_A] = (BYTE)temp_word;
1685 break;
1686
1687 case 0x66: //OR (A-F)
1688 temp_word = (WORD)Registers[REGISTER_A] | (WORD)Registers[REGISTER_F];
1689 set_flag_n((BYTE)temp_word);
1690 set_flag_z((BYTE)temp_word);
1691 Flags = Flags & (0xFF - FLAG_V);
1692 Registers[REGISTER_A] = (BYTE)temp_word;
1693 break;
1694
1695 case 0x28: //EOR (A-B)
1696 temp_word = (WORD)Registers[REGISTER_A] ^ (WORD)Registers[REGISTER_B];
1697 set_flag_n((BYTE)temp_word);
1698 set_flag_z((BYTE)temp_word);
1699 Flags = Flags & (0xFF - FLAG_V);
1700 Registers[REGISTER_A] = (BYTE)temp_word;
1701 break;
1702
1703 case 0x38: //EOR (A-C)
1704 temp_word = (WORD)Registers[REGISTER_A] ^ (WORD)Registers[REGISTER_C];
1705 set_flag_n((BYTE)temp_word);
1706 set_flag_z((BYTE)temp_word);
1707 Flags = Flags & (0xFF - FLAG_V);
1708 Registers[REGISTER_A] = (BYTE)temp_word;
1709 break;
1710
1711
1712 case 0x48: //EOR (A-D)
1713 temp_word = (WORD)Registers[REGISTER_A] ^ (WORD)Registers[REGISTER_D];
1714 set_flag_n((BYTE)temp_word);
1715 set_flag_z((BYTE)temp_word);
1716 Flags = Flags & (0xFF - FLAG_V);
1717 Registers[REGISTER_A] = (BYTE)temp_word;
1718 break;
1719
1720 case 0x58: //EOR (A-E)
1721 temp_word = (WORD)Registers[REGISTER_A] ^ (WORD)Registers[REGISTER_E];
1722 set_flag_n((BYTE)temp_word);
1723 set_flag_z((BYTE)temp_word);
1724 Flags = Flags & (0xFF - FLAG_V);
1725 Registers[REGISTER_A] = (BYTE)temp_word;
1726 break;
1727
1728 case 0x68: //EOR (A-F)
1729 temp_word = (WORD)Registers[REGISTER_A] ^ (WORD)Registers[REGISTER_F];
1730 set_flag_n((BYTE)temp_word);
1731 set_flag_z((BYTE)temp_word);
1732 Flags = Flags & (0xFF - FLAG_V);
1733 Registers[REGISTER_A] = (BYTE)temp_word;
1734 break;
1735
1736
1737 case 0xD8: //COMA - Negates Memory or Accumulator
1738 Registers[REGISTER_A] = ~Registers[REGISTER_A];
1739 set_flag_n((BYTE)Registers[REGISTER_A]);
1740 set_flag_z((BYTE)Registers[REGISTER_A]);
1741 break;
1742
1743
1744 case 0x98: //COM - Negates Memory or Accumulator
1745 HB = fetch();
1746 LB = fetch();
1747 address = ((WORD)HB << 8) + LB;
1748
1749 if (address >= 0 && address < MEMORY_SIZE) {
1750 temp_word = ~Memory[address];
1751 if (temp_word >= 0x100) {
1752 Flags = Flags | FLAG_C; // Set Carry Flag
1753 }
1754 else {
1755 Flags = Flags & (0xFF - FLAG_C); // Clear Carry Flag
1756 }
1757 set_flag_z((BYTE)temp_word);
1758 set_flag_n((BYTE)temp_word);
1759 Memory[address] = (BYTE)temp_word;
1760 }
1761 break;
1762
1763 case 0xA8: //COM Absolute X
1764 address += Index_Registers[REGISTER_X];
1765 HB = fetch();
1766 LB = fetch();
1767 address = ((WORD)HB << 8) + LB;
1768
1769 if (address >= 0 && address < MEMORY_SIZE) {
1770 temp_word = ~Memory[address];
1771 if (temp_word >= 0x100) {
1772 Flags = Flags | FLAG_C; // Set Carry Flag
1773 }
1774 else {
1775 Flags = Flags & (0xFF - FLAG_C); // Clear Carry Flag
1776 }
1777 set_flag_z((BYTE)temp_word);
1778 set_flag_n((BYTE)temp_word);
1779 Memory[address] = (BYTE)temp_word;
1780 }
1781 break;
1782
1783 case 0xB8: //COM Absolute Y
1784 address += Index_Registers[REGISTER_Y];
1785 HB = fetch();
1786 LB = fetch();
1787 address = ((WORD)HB << 8) + LB;
1788
1789 if (address >= 0 && address < MEMORY_SIZE) {
1790 temp_word = ~Memory[address];
1791 if (temp_word >= 0x100) {
1792 Flags = Flags | FLAG_C; // Set Carry Flag
1793 }
1794 else {
1795 Flags = Flags & (0xFF - FLAG_C); // Clear Carry Flag
1796 }
1797 set_flag_z((BYTE)temp_word);
1798 set_flag_n((BYTE)temp_word);
1799 Memory[address] = (BYTE)temp_word;
1800 }
1801 break;
1802
1803 case 0xC8: //COM Absolute X, Y
1804 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1805 HB = fetch();
1806 LB = fetch();
1807 address = ((WORD)HB << 8) + LB;
1808
1809 if (address >= 0 && address < MEMORY_SIZE) {
1810 temp_word = ~Memory[address];
1811 if (temp_word >= 0x100) {
1812 Flags = Flags | FLAG_C; // Set Carry Flag
1813 }
1814 else {
1815 Flags = Flags & (0xFF - FLAG_C); // Clear Carry Flag
1816 }
1817 set_flag_z((BYTE)temp_word);
1818 set_flag_n((BYTE)temp_word);
1819 Memory[address] = (BYTE)temp_word;
1820 }
1821 break;
1822
1823
1824
1825 case 0xD5: //RCLA - Rotate Left Through Carry Memory or Accumulator
1826 saved_flags = Flags;
1827 if ((Registers[REGISTER_A] & 0x80) == 0x80) {
1828 Flags = Flags | FLAG_C;
1829 }
1830 else {
1831 Flags = Flags & (0xFF - FLAG_C);
1832 }
1833
1834 Registers[REGISTER_A] = (Registers[REGISTER_A] << 1) & 0xFE;
1835 if ((saved_flags & FLAG_C) == FLAG_C) {
1836 Registers[REGISTER_A] = Registers[REGISTER_A] | 0x01;
1837 }
1838 set_flag_z(Registers[REGISTER_A]);
1839 set_flag_n(Registers[REGISTER_A]);
1840 break;
1841
1842 case 0xD4: //RCRA
1843 saved_flags = Flags;
1844 if ((Registers[REGISTER_A] & 0x01) == 0x01) {
1845 Flags = Flags | FLAG_C;
1846 }
1847 else {
1848 Flags = Flags & (0xFF - FLAG_C);
1849 }
1850
1851 Registers[REGISTER_A] = (Registers[REGISTER_A] >> 1) & 0x7F;
1852 if ((saved_flags & FLAG_C) == FLAG_C) {
1853 Registers[REGISTER_A] = Registers[REGISTER_A] | 0x80;
1854 }
1855 set_flag_z(Registers[REGISTER_A]);
1856 set_flag_n(Registers[REGISTER_A]);
1857 break;
1858
1859 case 0xD6: // ASLA
1860 saved_flags = Flags;
1861 if ((Registers[REGISTER_A] & 0x80) == 0x80) {
1862 Flags = Flags | FLAG_C;
1863 }
1864 else {
1865 Flags = Flags & (0xFF - FLAG_C);
1866 }
1867 Registers[REGISTER_A] = (Registers[REGISTER_A] << 1) & 0xFE;
1868
1869 set_flag_z(Registers[REGISTER_A]);
1870 set_flag_n(Registers[REGISTER_A]);
1871 break;
1872
1873 case 0x97: //SAR ABS
1874 HB = fetch();
1875 LB = fetch();
1876 address += (WORD)((WORD)HB << 8) + LB;
1877 if ((Memory[address] & 0x01) == 0x01) {
1878 Flags = Flags | FLAG_C;
1879 }
1880 else {
1881 Flags = Flags & (0xFF - FLAG_C);
1882 }
1883
1884 if (address >= 0 && address < MEMORY_SIZE) {
1885 Memory[address] = (Memory[address] >> 1) & 0x7F;
1886 }
1887 if ((Flags & FLAG_N) == FLAG_N) {
1888 Memory[address] = Memory[address] | 0x80;
1889 }
1890 set_flag_c(Registers[REGISTER_A]);
1891 set_flag_z(Registers[REGISTER_A]);
1892 set_flag_n(Registers[REGISTER_A]);
1893 break;
1894
1895 case 0xA7: //SAR ABS,X
1896 address += Index_Registers[REGISTER_X];
1897 HB = fetch();
1898 LB = fetch();
1899 address += (WORD)((WORD)HB << 8) + LB;
1900 if ((Memory[address] & 0x01) == 0x01) {
1901 Flags = Flags | FLAG_C;
1902 }
1903 else {
1904 Flags = Flags & (0xFF - FLAG_C);
1905 }
1906
1907 if (address >= 0 && address < MEMORY_SIZE) {
1908 Memory[address] = (Memory[address] >> 1) & 0x7F;
1909 }
1910 if ((Flags & FLAG_N) == FLAG_N) {
1911 Memory[address] = Memory[address] | 0x80;
1912 }
1913 set_flag_c(Registers[REGISTER_X]);
1914 set_flag_z(Registers[REGISTER_X]);
1915 set_flag_n(Registers[REGISTER_X]);
1916 break;
1917
1918 case 0xB7: //SAR ABS,Y
1919 address += Index_Registers[REGISTER_Y];
1920 HB = fetch();
1921 LB = fetch();
1922 address += (WORD)((WORD)HB << 8) + LB;
1923 if ((Memory[address] & 0x01) == 0x01) {
1924 Flags = Flags | FLAG_C;
1925 }
1926 else {
1927 Flags = Flags & (0xFF - FLAG_C);
1928 }
1929
1930 if (address >= 0 && address < MEMORY_SIZE) {
1931 Memory[address] = (Memory[address] >> 1) & 0x7F;
1932 }
1933 if ((Flags & FLAG_N) == FLAG_N) {
1934 Memory[address] = Memory[address] | 0x80;
1935 }
1936 set_flag_c(Registers[REGISTER_Y]);
1937 set_flag_z(Registers[REGISTER_Y]);
1938 set_flag_n(Registers[REGISTER_Y]);
1939 break;
1940
1941 case 0xC7: //SAR ABS,XY
1942 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
1943 HB = fetch();
1944 LB = fetch();
1945 address += (WORD)((WORD)HB << 8) + LB;
1946 if ((Memory[address] & 0x01) == 0x01) {
1947 Flags = Flags | FLAG_C;
1948 }
1949 else {
1950 Flags = Flags & (0xFF - FLAG_C);
1951 }
1952
1953 if (address >= 0 && address < MEMORY_SIZE) {
1954 Memory[address] = (Memory[address] >> 1) & 0x7F;
1955 }
1956 if ((Flags & FLAG_N) == FLAG_N) {
1957 Memory[address] = Memory[address] | 0x80;
1958 }
1959 set_flag_c(Registers[REGISTER_X]);
1960 set_flag_z(Registers[REGISTER_X]);
1961 set_flag_n(Registers[REGISTER_X]);
1962 break;
1963
1964 case 0xD7: // SARA
1965 saved_flags = Flags;
1966 if ((Registers[REGISTER_A] & 0x01) == 0x01) {
1967 Flags = Flags | FLAG_C;
1968 }
1969 else {
1970 Flags = Flags & (0xFF - FLAG_C);
1971 }
1972 Registers[REGISTER_A] = (Registers[REGISTER_A] >> 1) & 0x7F;
1973 if ((saved_flags & FLAG_N) == FLAG_N) {
1974 Registers[REGISTER_A] = Registers[REGISTER_A] | 0x80;
1975 }
1976
1977 set_flag_z(Registers[REGISTER_A]);
1978 set_flag_n(Registers[REGISTER_A]);
1979 break;
1980
1981 case 0x95: //RLC Absolute
1982 {
1983 HB = fetch();
1984 LB = fetch();
1985 address = ((WORD)HB << 8) + LB;
1986 BYTE temp_byte = (Memory[address] << 1) & 0xFE;
1987
1988 if (address >= 0 && address < MEMORY_SIZE) {
1989 if ((Flags & FLAG_C) == FLAG_C) {
1990 temp_byte = temp_byte | 0x1;
1991 }
1992 }
1993
1994 if ((Memory[address] & 0x80) == 0x80) {
1995 Flags |= FLAG_C;
1996 }
1997 else {
1998 Flags &= (0xFF - FLAG_C);
1999 }
2000 set_flag_n(temp_byte);
2001 set_flag_z(temp_byte);
2002 Memory[address] = temp_byte;
2003 }
2004 break;
2005
2006 case 0xA5: //RLC Absolute X
2007 {
2008 address += Index_Registers[REGISTER_X];
2009 HB = fetch();
2010 LB = fetch();
2011 address = ((WORD)HB << 8) + LB;
2012 BYTE temp_byte = (Memory[address] << 1) & 0xFE;
2013
2014 if (address >= 0 && address < MEMORY_SIZE) {
2015 if ((Flags & FLAG_C) == FLAG_C) {
2016 temp_byte = temp_byte | 0x1;
2017 }
2018 }
2019
2020 if ((Memory[address] & 0x80) == 0x80) {
2021 Flags |= FLAG_C;
2022 }
2023 else {
2024 Flags &= (0xFF - FLAG_C);
2025 }
2026 set_flag_n(temp_byte);
2027 set_flag_z(temp_byte);
2028 Memory[address] = temp_byte;
2029 }
2030 break;
2031
2032 case 0xB5: //RLC Absolute Y
2033 {
2034 address += Index_Registers[REGISTER_Y];
2035 HB = fetch();
2036 LB = fetch();
2037 address = ((WORD)HB << 8) + LB;
2038 BYTE temp_byte = (Memory[address] << 1) & 0xFE;
2039
2040 if (address >= 0 && address < MEMORY_SIZE) {
2041 if ((Flags & FLAG_C) == FLAG_C) {
2042 temp_byte = temp_byte | 0x1;
2043 }
2044 }
2045
2046 if ((Memory[address] & 0x80) == 0x80) {
2047 Flags |= FLAG_C;
2048 }
2049 else {
2050 Flags &= (0xFF - FLAG_C);
2051 }
2052 set_flag_n(temp_byte);
2053 set_flag_z(temp_byte);
2054 Memory[address] = temp_byte;
2055 }
2056 break;
2057
2058 case 0xC5: //RLC Absolute XY
2059 {
2060 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
2061 HB = fetch();
2062 LB = fetch();
2063 address = ((WORD)HB << 8) + LB;
2064 BYTE temp_byte = (Memory[address] << 1) & 0xFE;
2065
2066 if (address >= 0 && address < MEMORY_SIZE) {
2067 if ((Flags & FLAG_C) == FLAG_C) {
2068 temp_byte = temp_byte | 0x1;
2069 }
2070 }
2071
2072 if ((Memory[address] & 0x80) == 0x80) {
2073 Flags |= FLAG_C;
2074 }
2075 else {
2076 Flags &= (0xFF - FLAG_C);
2077 }
2078 set_flag_n(temp_byte);
2079 set_flag_z(temp_byte);
2080 Memory[address] = temp_byte;
2081 }
2082 break;
2083
2084 case 0x93: //DEC abs
2085 HB = fetch();
2086 LB = fetch();
2087 address += (WORD)((WORD)HB << 8) + LB;
2088 --Memory[address];
2089 set_flag_n(Memory[address]);
2090 set_flag_z(Memory[address]);
2091 break;
2092
2093 case 0xA3: //DEC abs X
2094 address += Index_Registers[REGISTER_X];
2095 HB = fetch();
2096 LB = fetch();
2097 address += (WORD)((WORD)HB << 8) + LB;
2098 --Memory[address];
2099 set_flag_n(Memory[address]);
2100 set_flag_z(Memory[address]);
2101 break;
2102
2103 case 0xB3: //DEC abs Y
2104 address += Index_Registers[REGISTER_Y];
2105 HB = fetch();
2106 LB = fetch();
2107 address += (WORD)((WORD)HB << 8) + LB;
2108 --Memory[address];
2109 set_flag_n(Memory[address]);
2110 set_flag_z(Memory[address]);
2111 break;
2112
2113 case 0xC3: //DEC abs XY
2114 address += (WORD)((WORD)Index_Registers[REGISTER_Y] << 8) + Index_Registers[REGISTER_X];
2115 HB = fetch();
2116 LB = fetch();
2117 address += (WORD)((WORD)HB << 8) + LB;
2118 --Memory[address];
2119 set_flag_n(Memory[address]);
2120 set_flag_z(Memory[address]);
2121 break;
2122
2123
2124 }
2125}
2126
2127void Group_2_Move(BYTE opcode)
2128
2129{
2130 ///////////////////////////////////////////////////////////// LD ///////////////////////////////////////////////////
2131 BYTE destination = opcode >> 4; //top four bits point at one register....shift right to keep only top four
2132 BYTE source = opcode & 0x0F;//takes bottom four bits
2133 int destReg = 0;
2134 int sourceReg = 0;
2135
2136 switch (destination ){//COMBO OF DEST AND SOURCE GIVE REGISTERS ADDRESSES TO FOR MEMORY ADRESSER AT BOTTOMM
2137 case 0x02://top four bits from op code
2138 destReg = REGISTER_A;
2139 break;
2140
2141 case 0x03:
2142 destReg = REGISTER_B;
2143 break;
2144
2145 case 0x04:
2146 destReg = REGISTER_C;
2147 break;
2148
2149 case 0x05:
2150 destReg = REGISTER_D;
2151 break;
2152
2153 case 0x06:
2154 destReg = REGISTER_E;
2155 break;
2156
2157 case 0x07:
2158 destReg = REGISTER_F;
2159 break;
2160}
2161
2162 switch (source) {
2163
2164 case 0x0A:
2165 sourceReg = REGISTER_A;
2166 break;
2167
2168 case 0x0B:
2169 sourceReg = REGISTER_B;
2170 break;
2171
2172 case 0x0C:
2173 sourceReg = REGISTER_C;
2174 break;
2175
2176 case 0x0D:
2177 sourceReg = REGISTER_D;
2178 break;
2179
2180 case 0x0E:
2181 sourceReg = REGISTER_E;
2182 break;
2183
2184 case 0x0F:
2185 sourceReg = REGISTER_F;
2186 break;
2187 }
2188
2189 Registers[sourceReg] = Registers[destReg];//code to assign sourcereg to dest reg
2190
2191}
2192
2193void execute(BYTE opcode)
2194{
2195 if (((opcode >= 0x2A) && (opcode <= 0x2F))
2196 || ((opcode >= 0x3A) && (opcode <= 0x3F))
2197 || ((opcode >= 0x4A) && (opcode <= 0x4F))
2198 || ((opcode >= 0x5A) && (opcode <= 0x5F))
2199 || ((opcode >= 0x6A) && (opcode <= 0x6F))
2200 || ((opcode >= 0x7A) && (opcode <= 0x7F)))
2201 {
2202 Group_2_Move(opcode);
2203 }
2204 else
2205 {
2206 Group_1(opcode);
2207 }
2208}
2209
2210void emulate()
2211{
2212 BYTE opcode;
2213 int sanity;
2214
2215 sanity = 0;
2216 ProgramCounter = 0;
2217 halt = false;
2218 memory_in_range = true;
2219
2220 printf(" A B C D E F X Y SP\n");
2221
2222 while ((!halt) && (memory_in_range)) {
2223 sanity++;
2224 if (sanity > 500) halt = true;
2225 // printf("%04X ", ProgramCounter); // Print current address
2226 opcode = fetch();
2227 execute(opcode);
2228
2229 //printf("%s ", opcode_mneumonics[opcode]); // Print current opcode
2230
2231 //printf("%02X ", Registers[REGISTER_A]);
2232 //printf("%02X ", Registers[REGISTER_B]);
2233 //printf("%02X ", Registers[REGISTER_C]);
2234 //printf("%02X ", Registers[REGISTER_D]);
2235 //printf("%02X ", Registers[REGISTER_E]);
2236 //printf("%02X ", Registers[REGISTER_F]);
2237 //printf("%02X ", Index_Registers[REGISTER_X]);
2238 //printf("%02X ", Index_Registers[REGISTER_Y]);
2239 //printf("%04X ", StackPointer); // Print Stack Pointer
2240
2241 /*if ((Flags & FLAG_I) == FLAG_I)
2242 {
2243 printf("I=1 ");
2244 }
2245 else
2246 {
2247 printf("I=0 ");
2248 }
2249 if ((Flags & FLAG_V) == FLAG_V)
2250 {
2251 printf("V=1 ");
2252 }
2253 else
2254 {
2255 printf("V=0 ");
2256 }
2257 if ((Flags & FLAG_N) == FLAG_N)
2258 {
2259 printf("N=1 ");
2260 }
2261 else
2262 {
2263 printf("N=0 ");
2264 }
2265 if ((Flags & FLAG_Z) == FLAG_Z)
2266 {
2267 printf("Z=1 ");
2268 }
2269 else
2270 {
2271 printf("Z=0 ");
2272 }
2273 if ((Flags & FLAG_C) == FLAG_C)
2274 {
2275 printf("C=1 ");
2276 }
2277 else
2278 {
2279 printf("C=0 ");
2280 }
2281
2282 printf("\n"); // New line*/
2283 }
2284
2285 printf("\n"); // New line
2286}
2287
2288
2289////////////////////////////////////////////////////////////////////////////////
2290// Simulator/Emulator (End) //
2291////////////////////////////////////////////////////////////////////////////////
2292
2293
2294void initialise_filenames() {
2295 int i;
2296
2297 for (i=0; i<MAX_FILENAME_SIZE; i++) {
2298 hex_file [i] = '\0';
2299 trc_file [i] = '\0';
2300 }
2301}
2302
2303
2304
2305
2306int find_dot_position(char *filename) {
2307 int dot_position;
2308 int i;
2309 char chr;
2310
2311 dot_position = 0;
2312 i = 0;
2313 chr = filename[i];
2314
2315 while (chr != '\0') {
2316 if (chr == '.') {
2317 dot_position = i;
2318 }
2319 i++;
2320 chr = filename[i];
2321 }
2322
2323 return (dot_position);
2324}
2325
2326
2327int find_end_position(char *filename) {
2328 int end_position;
2329 int i;
2330 char chr;
2331
2332 end_position = 0;
2333 i = 0;
2334 chr = filename[i];
2335
2336 while (chr != '\0') {
2337 end_position = i;
2338 i++;
2339 chr = filename[i];
2340 }
2341
2342 return (end_position);
2343}
2344
2345
2346bool file_exists(char *filename) {
2347 bool exists;
2348 FILE *ifp;
2349
2350 exists = false;
2351
2352 if ( ( ifp = fopen( filename, "r" ) ) != NULL ) {
2353 exists = true;
2354
2355 fclose(ifp);
2356 }
2357
2358 return (exists);
2359}
2360
2361
2362
2363void create_file(char *filename) {
2364 FILE *ofp;
2365
2366 if ( ( ofp = fopen( filename, "w" ) ) != NULL ) {
2367 fclose(ofp);
2368 }
2369}
2370
2371
2372
2373bool getline(FILE *fp, char *buffer) {
2374 bool rc;
2375 bool collect;
2376 char c;
2377 int i;
2378
2379 rc = false;
2380 collect = true;
2381
2382 i = 0;
2383 while (collect) {
2384 c = getc(fp);
2385
2386 switch (c) {
2387 case EOF:
2388 if (i > 0) {
2389 rc = true;
2390 }
2391 collect = false;
2392 break;
2393
2394 case '\n':
2395 if (i > 0) {
2396 rc = true;
2397 collect = false;
2398 buffer[i] = '\0';
2399 }
2400 break;
2401
2402 default:
2403 buffer[i] = c;
2404 i++;
2405 break;
2406 }
2407 }
2408
2409 return (rc);
2410}
2411
2412
2413
2414
2415
2416
2417void load_and_run(int args,_TCHAR** argv) {
2418 char chr;
2419 int ln;
2420 int dot_position;
2421 int end_position;
2422 long i;
2423 FILE *ifp;
2424 long address;
2425 long load_at;
2426 int code;
2427
2428 // Prompt for the .hex file
2429
2430 printf("\n");
2431 printf("Enter the hex filename (.hex): ");
2432
2433 if(args == 2){
2434 ln = 0;
2435 chr = argv[1][ln];
2436 while (chr != '\0')
2437 {
2438 if (ln < MAX_FILENAME_SIZE)
2439 {
2440 hex_file [ln] = chr;
2441 trc_file [ln] = chr;
2442 ln++;
2443 }
2444 chr = argv[1][ln];
2445 }
2446 } else {
2447 ln = 0;
2448 chr = '\0';
2449 while (chr != '\n') {
2450 chr = getchar();
2451
2452 switch(chr) {
2453 case '\n':
2454 break;
2455 default:
2456 if (ln < MAX_FILENAME_SIZE) {
2457 hex_file [ln] = chr;
2458 trc_file [ln] = chr;
2459 ln++;
2460 }
2461 break;
2462 }
2463 }
2464
2465 }
2466 // Tidy up the file names
2467
2468 dot_position = find_dot_position(hex_file);
2469 if (dot_position == 0) {
2470 end_position = find_end_position(hex_file);
2471
2472 hex_file[end_position + 1] = '.';
2473 hex_file[end_position + 2] = 'h';
2474 hex_file[end_position + 3] = 'e';
2475 hex_file[end_position + 4] = 'x';
2476 hex_file[end_position + 5] = '\0';
2477 } else {
2478 hex_file[dot_position + 0] = '.';
2479 hex_file[dot_position + 1] = 'h';
2480 hex_file[dot_position + 2] = 'e';
2481 hex_file[dot_position + 3] = 'x';
2482 hex_file[dot_position + 4] = '\0';
2483 }
2484
2485 dot_position = find_dot_position(trc_file);
2486 if (dot_position == 0) {
2487 end_position = find_end_position(trc_file);
2488
2489 trc_file[end_position + 1] = '.';
2490 trc_file[end_position + 2] = 't';
2491 trc_file[end_position + 3] = 'r';
2492 trc_file[end_position + 4] = 'c';
2493 trc_file[end_position + 5] = '\0';
2494 } else {
2495 trc_file[dot_position + 0] = '.';
2496 trc_file[dot_position + 1] = 't';
2497 trc_file[dot_position + 2] = 'r';
2498 trc_file[dot_position + 3] = 'c';
2499 trc_file[dot_position + 4] = '\0';
2500 }
2501
2502 if (file_exists(hex_file)) {
2503 // Clear Registers and Memory
2504
2505 Registers[REGISTER_A] = 0;
2506 Registers[REGISTER_B] = 0;
2507 Registers[REGISTER_C] = 0;
2508 Registers[REGISTER_D] = 0;
2509 Registers[REGISTER_E] = 0;
2510 Registers[REGISTER_F] = 0;
2511 Index_Registers[REGISTER_X] = 0;
2512 Index_Registers[REGISTER_Y] = 0;
2513 Flags = 0;
2514 ProgramCounter = 0;
2515 StackPointer = 0;
2516
2517 for (i=0; i<MEMORY_SIZE; i++) {
2518 Memory[i] = 0x00;
2519 }
2520
2521 // Load hex file
2522
2523 if ( ( ifp = fopen( hex_file, "r" ) ) != NULL ) {
2524 printf("Loading file...\n\n");
2525
2526 load_at = 0;
2527
2528 while (getline(ifp, InputBuffer)) {
2529 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
2530 load_at = address;
2531 } else if (sscanf(InputBuffer, "%x", &code) == 1) {
2532 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
2533 Memory[load_at] = (BYTE)code;
2534 }
2535 load_at++;
2536 } else {
2537 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
2538 }
2539 }
2540
2541 fclose(ifp);
2542 }
2543
2544 // Emulate
2545
2546 emulate();
2547 } else {
2548 printf("\n");
2549 printf("ERROR> Input file %s does not exist!\n", hex_file);
2550 printf("\n");
2551 }
2552}
2553
2554void building(int args,_TCHAR** argv){
2555 char buffer[1024];
2556 load_and_run(args,argv);
2557 sprintf(buffer, "0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X",
2558 Memory[TEST_ADDRESS_1],
2559 Memory[TEST_ADDRESS_2],
2560 Memory[TEST_ADDRESS_3],
2561 Memory[TEST_ADDRESS_4],
2562 Memory[TEST_ADDRESS_5],
2563 Memory[TEST_ADDRESS_6],
2564 Memory[TEST_ADDRESS_7],
2565 Memory[TEST_ADDRESS_8],
2566 Memory[TEST_ADDRESS_9],
2567 Memory[TEST_ADDRESS_10],
2568 Memory[TEST_ADDRESS_11],
2569 Memory[TEST_ADDRESS_12]
2570 );
2571 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2572}
2573
2574
2575
2576void test_and_mark() {
2577 char buffer[1024];
2578 bool testing_complete;
2579 int len = sizeof(SOCKADDR);
2580 char chr;
2581 int i;
2582 int j;
2583 bool end_of_program;
2584 long address;
2585 long load_at;
2586 int code;
2587 int mark;
2588 int passed;
2589
2590 printf("\n");
2591 printf("Automatic Testing and Marking\n");
2592 printf("\n");
2593
2594 testing_complete = false;
2595
2596 sprintf(buffer, "Test Student %s", STUDENT_NUMBER);
2597 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2598
2599 while (!testing_complete) {
2600 memset(buffer, '\0', sizeof(buffer));
2601
2602 if (recvfrom(sock, buffer, sizeof(buffer)-1, 0, (SOCKADDR *)&client_addr, &len) != SOCKET_ERROR) {
2603 printf("Incoming Data: %s \n", buffer);
2604
2605 //if (strcmp(buffer, "Testing complete") == 1)
2606 if (sscanf(buffer, "Testing complete %d", &mark) == 1) {
2607 testing_complete = true;
2608 printf("Current mark = %d\n", mark);
2609
2610 }else if (sscanf(buffer, "Tests passed %d", &passed) == 1) {
2611 //testing_complete = true;
2612 printf("Passed = %d\n", passed);
2613
2614 } else if (strcmp(buffer, "Error") == 0) {
2615 printf("ERROR> Testing abnormally terminated\n");
2616 testing_complete = true;
2617 } else {
2618 // Clear Registers and Memory
2619
2620 Registers[REGISTER_A] = 0;
2621 Registers[REGISTER_B] = 0;
2622 Registers[REGISTER_C] = 0;
2623 Registers[REGISTER_D] = 0;
2624 Registers[REGISTER_E] = 0;
2625 Registers[REGISTER_F] = 0;
2626 Index_Registers[REGISTER_X] = 0;
2627 Index_Registers[REGISTER_Y] = 0;
2628 Flags = 0;
2629 ProgramCounter = 0;
2630 StackPointer = 0;
2631 for (i=0; i<MEMORY_SIZE; i++) {
2632 Memory[i] = 0;
2633 }
2634
2635 // Load hex file
2636
2637 i = 0;
2638 j = 0;
2639 load_at = 0;
2640 end_of_program = false;
2641 FILE *ofp;
2642 fopen_s(&ofp ,"branch.txt", "a");
2643
2644 while (!end_of_program) {
2645 chr = buffer[i];
2646 switch (chr) {
2647 case '\0':
2648 end_of_program = true;
2649
2650 case ',':
2651 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
2652 load_at = address;
2653 } else if (sscanf(InputBuffer, "%x", &code) == 1) {
2654 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
2655 Memory[load_at] = (BYTE)code;
2656 fprintf(ofp, "%02X\n", (BYTE)code);
2657 }
2658 load_at++;
2659 } else {
2660 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
2661 }
2662 j = 0;
2663 break;
2664
2665 default:
2666 InputBuffer[j] = chr;
2667 j++;
2668 break;
2669 }
2670 i++;
2671 }
2672 fclose(ofp);
2673 // Emulate
2674
2675 if (load_at > 1) {
2676 emulate();
2677 // Send and store results
2678 sprintf(buffer, "%02X%02X %02X%02X %02X%02X %02X%02X %02X%02X %02X%02X",
2679 Memory[TEST_ADDRESS_1],
2680 Memory[TEST_ADDRESS_2],
2681 Memory[TEST_ADDRESS_3],
2682 Memory[TEST_ADDRESS_4],
2683 Memory[TEST_ADDRESS_5],
2684 Memory[TEST_ADDRESS_6],
2685 Memory[TEST_ADDRESS_7],
2686 Memory[TEST_ADDRESS_8],
2687 Memory[TEST_ADDRESS_9],
2688 Memory[TEST_ADDRESS_10],
2689 Memory[TEST_ADDRESS_11],
2690 Memory[TEST_ADDRESS_12]
2691 );
2692 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR *)&server_addr, sizeof(SOCKADDR));
2693 }
2694 }
2695 }
2696 }
2697}
2698
2699
2700
2701int _tmain(int argc, _TCHAR* argv[])
2702{
2703 char chr;
2704 char dummy;
2705
2706 printf("\n");
2707 printf("Microprocessor Emulator\n");
2708 printf("UWE Computer and Network Systems Assignment 1\n");
2709 printf("\n");
2710
2711 initialise_filenames();
2712
2713 if (WSAStartup(MAKEWORD(2, 2), &data) != 0) return(0);
2714
2715 sock = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); // Here we create our socket, which will be a UDP socket (SOCK_DGRAM).
2716 if (!sock) {
2717 // Creation failed!
2718 }
2719
2720 memset(&server_addr, 0, sizeof(SOCKADDR_IN));
2721 server_addr.sin_family = AF_INET;
2722 server_addr.sin_addr.s_addr = inet_addr(IP_ADDRESS_SERVER);
2723 server_addr.sin_port = htons(PORT_SERVER);
2724
2725 memset(&client_addr, 0, sizeof(SOCKADDR_IN));
2726 client_addr.sin_family = AF_INET;
2727 client_addr.sin_addr.s_addr = inet_addr("127.0.0.1");
2728 client_addr.sin_port = htons(PORT_CLIENT);
2729
2730 chr = '\0';
2731 while ((chr != 'e') && (chr != 'E'))
2732 {
2733 printf("\n");
2734 printf("Please select option\n");
2735 printf("L - Load and run a hex file\n");
2736 printf("T - Have the server test and mark your emulator\n");
2737 printf("E - Exit\n");
2738 if(argc == 2){ building(argc,argv); exit(0);}
2739 printf("Enter option: ");
2740 chr = getchar();
2741 if (chr != 0x0A)
2742 {
2743 dummy = getchar(); // read in the <CR>
2744 }
2745 printf("\n");
2746
2747 switch (chr)
2748 {
2749 case 'L':
2750 case 'l':
2751 load_and_run(argc,argv);
2752 break;
2753
2754 case 'T':
2755 case 't':
2756 test_and_mark();
2757 break;
2758
2759 default:
2760 break;
2761 }
2762 }
2763
2764 closesocket(sock);
2765 WSACleanup();
2766
2767
2768 return 0;
2769}