· 5 years ago · Feb 24, 2020, 11:54 PM
1#include "stdafx.h"
2#include <winsock2.h>
3
4#pragma comment(lib, "wsock32.lib")
5
6
7#define STUDENT_NUMBER "18007506"
8
9#define IP_ADDRESS_SERVER "127.0.0.1"
10
11#define PORT_SERVER 0x1984 // We define a port that we are going to use.
12#define PORT_CLIENT 0x1985 // We define a port that we are going to use.
13
14#define WORD unsigned short
15#define DWORD unsigned long
16#define BYTE unsigned char
17
18#define MAX_FILENAME_SIZE 500
19#define MAX_BUFFER_SIZE 500
20
21SOCKADDR_IN server_addr;
22SOCKADDR_IN client_addr;
23
24SOCKET sock; // This is our socket, it is the handle to the IO address to read/write packets
25
26WSADATA data;
27
28char InputBuffer[MAX_BUFFER_SIZE];
29
30char hex_file[MAX_BUFFER_SIZE];
31char trc_file[MAX_BUFFER_SIZE];
32
33//////////////////////////
34// Registers //
35//////////////////////////
36
37#define FLAG_I 0x80
38#define FLAG_N 0x20
39#define FLAG_V 0x10
40#define FLAG_Z 0x08
41#define FLAG_C 0x01
42
43#define REGISTER_M 7
44#define REGISTER_A 6
45#define REGISTER_H 5
46#define REGISTER_L 4
47#define REGISTER_E 3
48#define REGISTER_D 2
49#define REGISTER_C 1
50#define REGISTER_B 0
51WORD IndexRegister;
52
53BYTE Registers[8];
54BYTE Flags;
55WORD ProgramCounter;
56WORD StackPointer;
57
58
59////////////
60// Memory //
61////////////
62
63#define MEMORY_SIZE 65536
64
65BYTE Memory[MEMORY_SIZE];
66
67#define TEST_ADDRESS_1 0x01FA
68#define TEST_ADDRESS_2 0x01FB
69#define TEST_ADDRESS_3 0x01FC
70#define TEST_ADDRESS_4 0x01FD
71#define TEST_ADDRESS_5 0x01FE
72#define TEST_ADDRESS_6 0x01FF
73#define TEST_ADDRESS_7 0x0200
74#define TEST_ADDRESS_8 0x0201
75#define TEST_ADDRESS_9 0x0202
76#define TEST_ADDRESS_10 0x0203
77#define TEST_ADDRESS_11 0x0204
78#define TEST_ADDRESS_12 0x0205
79
80
81///////////////////////
82// Control variables //
83///////////////////////
84
85bool memory_in_range = true;
86bool halt = false;
87
88
89///////////////////////
90// Disassembly table //
91///////////////////////
92
93char opcode_mneumonics[][14] =
94{
95"BRA rel ",
96"BCC rel ",
97"BCS rel ",
98"BNE rel ",
99"BEQ rel ",
100"BVC rel ",
101"BVS rel ",
102"BMI rel ",
103"BPL rel ",
104"BGE rel ",
105"BLE rel ",
106"BLS rel ",
107"BHI rel ",
108"ILLEGAL ",
109"RTN impl ",
110"ILLEGAL ",
111
112"ST abs ",
113"PSH ,A ",
114"POP A, ",
115"ILLEGAL ",
116"ILLEGAL ",
117"CLC impl ",
118"SEC impl ",
119"CLI impl ",
120"STI impl ",
121"SEV impl ",
122"CLV impl ",
123"DEX impl ",
124"INX impl ",
125"NOP impl ",
126"WAI impl ",
127"ILLEGAL ",
128
129"ST abs,X ",
130"PSH ,s ",
131"POP s, ",
132"ILLEGAL ",
133"ILLEGAL ",
134"ADI # ",
135"SBI # ",
136"CPI # ",
137"ANI # ",
138"XRI # ",
139"MVI #,B ",
140"MVI #,C ",
141"MVI #,D ",
142"MVI #,E ",
143"MVI #,L ",
144"MVI #,H ",
145
146"ILLEGAL ",
147"PSH ,B ",
148"POP B, ",
149"JPR abs ",
150"CCC abs ",
151"CCS abs ",
152"CNE abs ",
153"CEQ abs ",
154"CVC abs ",
155"CVS abs ",
156"CMI abs ",
157"CPL abs ",
158"CHI abs ",
159"CLE abs ",
160"ILLEGAL ",
161"ILLEGAL ",
162
163"ILLEGAL ",
164"PSH ,C ",
165"POP C, ",
166"TST abs ",
167"INC abs ",
168"DEC abs ",
169"RCR abs ",
170"RCL abs ",
171"SAL abs ",
172"ASR abs ",
173"NOT abs ",
174"ROL abs ",
175"ROR abs ",
176"ILLEGAL ",
177"LDX # ",
178"LODS # ",
179
180"STOX abs ",
181"PSH ,D ",
182"POP D, ",
183"TST abs,X ",
184"INC abs,X ",
185"DEC abs,X ",
186"RCR abs,X ",
187"RCL abs,X ",
188"SAL abs,X ",
189"ASR abs,X ",
190"NOT abs,X ",
191"ROL abs,X ",
192"ROR abs,X ",
193"ILLEGAL ",
194"LDX abs ",
195"LODS abs ",
196
197"STOX abs,X ",
198"PSH ,E ",
199"POP E, ",
200"TSTA A,A ",
201"INCA A,A ",
202"DECA A,A ",
203"RCRA A,A ",
204"RCLA A,A ",
205"SALA A,A ",
206"ASRA A,A ",
207"NOTA A,A ",
208"ROLA A,A ",
209"RORA A,A ",
210"ILLEGAL ",
211"LDX abs,X ",
212"LODS abs,X ",
213
214"ILLEGAL ",
215"PSH ,L ",
216"POP L, ",
217"ILLEGAL ",
218"TAS impl ",
219"TSA impl ",
220"ILLEGAL ",
221"ILLEGAL ",
222"MOVE A,A ",
223"MOVE B,A ",
224"MOVE C,A ",
225"MOVE D,A ",
226"MOVE E,A ",
227"MOVE L,A ",
228"MOVE H,A ",
229"MOVE M,A ",
230
231"ILLEGAL ",
232"PSH ,H ",
233"POP H, ",
234"ILLEGAL ",
235"ILLEGAL ",
236"SWI impl ",
237"RTI impl ",
238"ILLEGAL ",
239"MOVE A,B ",
240"MOVE B,B ",
241"MOVE C,B ",
242"MOVE D,B ",
243"MOVE E,B ",
244"MOVE L,B ",
245"MOVE H,B ",
246"MOVE M,B ",
247
248"ADC A,B ",
249"SBC A,B ",
250"CMP A,B ",
251"IOR A,B ",
252"AND A,B ",
253"XOR A,B ",
254"BT A,B ",
255"ILLEGAL ",
256"MOVE A,C ",
257"MOVE B,C ",
258"MOVE C,C ",
259"MOVE D,C ",
260"MOVE E,C ",
261"MOVE L,C ",
262"MOVE H,C ",
263"MOVE M,C ",
264
265"ADC A,C ",
266"SBC A,C ",
267"CMP A,C ",
268"IOR A,C ",
269"AND A,C ",
270"XOR A,C ",
271"BT A,C ",
272"ILLEGAL ",
273"MOVE A,D ",
274"MOVE B,D ",
275"MOVE C,D ",
276"MOVE D,D ",
277"MOVE E,D ",
278"MOVE L,D ",
279"MOVE H,D ",
280"MOVE M,D ",
281
282"ADC A,D ",
283"SBC A,D ",
284"CMP A,D ",
285"IOR A,D ",
286"AND A,D ",
287"XOR A,D ",
288"BT A,D ",
289"LD # ",
290"MOVE A,E ",
291"MOVE B,E ",
292"MOVE C,E ",
293"MOVE D,E ",
294"MOVE E,E ",
295"MOVE L,E ",
296"MOVE H,E ",
297"MOVE M,E ",
298
299"ADC A,E ",
300"SBC A,E ",
301"CMP A,E ",
302"IOR A,E ",
303"AND A,E ",
304"XOR A,E ",
305"BT A,E ",
306"LD abs ",
307"MOVE A,L ",
308"MOVE B,L ",
309"MOVE C,L ",
310"MOVE D,L ",
311"MOVE E,L ",
312"MOVE L,L ",
313"MOVE H,L ",
314"MOVE M,L ",
315
316"ADC A,L ",
317"SBC A,L ",
318"CMP A,L ",
319"IOR A,L ",
320"AND A,L ",
321"XOR A,L ",
322"BT A,L ",
323"LD abs,X ",
324"MOVE A,H ",
325"MOVE B,H ",
326"MOVE C,H ",
327"MOVE D,H ",
328"MOVE E,H ",
329"MOVE L,H ",
330"MOVE H,H ",
331"MOVE M,H ",
332
333"ADC A,H ",
334"SBC A,H ",
335"CMP A,H ",
336"IOR A,H ",
337"AND A,H ",
338"XOR A,H ",
339"BT A,H ",
340"ILLEGAL ",
341"MOVE A,M ",
342"MOVE B,M ",
343"MOVE C,M ",
344"MOVE D,M ",
345"MOVE E,M ",
346"MOVE L,M ",
347"MOVE H,M ",
348"MOVE -,- ",
349
350"ADC A,M ",
351"SBC A,M ",
352"CMP A,M ",
353"IOR A,M ",
354"AND A,M ",
355"XOR A,M ",
356"BT A,M ",
357"ILLEGAL ",
358"ILLEGAL ",
359"ILLEGAL ",
360"JMP abs ",
361"ILLEGAL ",
362"ILLEGAL ",
363"ILLEGAL ",
364"ILLEGAL ",
365"ILLEGAL ",
366
367};
368
369////////////////////////////////////////////////////////////////////////////////
370// Simulator/Emulator (Start) //
371////////////////////////////////////////////////////////////////////////////////
372BYTE fetch()
373{
374 BYTE byte = 0;
375
376 if ((ProgramCounter >= 0) && (ProgramCounter <= MEMORY_SIZE))
377 {
378 memory_in_range = true;
379 byte = Memory[ProgramCounter];
380 ProgramCounter++;
381 }
382 else
383 {
384 memory_in_range = false;
385 }
386 return byte;
387}
388
389void set_flag_n(BYTE inReg) {
390 BYTE reg;
391 reg = inReg;
392 if ((reg & 0x80) != 0) // msbit set
393 {
394 Flags = Flags | FLAG_N;
395 }
396 else
397 {
398 Flags = Flags & (0xFF - FLAG_N);
399 }
400}
401
402
403void set_flag_v(BYTE in1, BYTE in2, BYTE out1)
404{
405 BYTE reg1in;
406 BYTE reg2in;
407 BYTE regOut;
408
409 reg1in = in1;
410 reg2in = in2;
411 regOut = out1;
412
413 if ((((reg1in & 0x80) == 0x80) && ((reg2in & 0x80) == 0x80) && ((regOut & 0x80) != 0x80)) //overflow
414 || (((reg1in & 0x80) != 0x80) && ((reg2in & 0x80) != 0x80) && ((regOut & 0x80) == 0x80))) //overflow
415 {
416 Flags = Flags | FLAG_V;
417 }
418
419 else
420 {
421 Flags = Flags & (0xFF - FLAG_V);
422 }
423}
424
425
426void set_flag_z(BYTE inReg) {
427 BYTE reg;
428 reg = inReg;
429 if (reg == 0) // zero set
430 {
431 Flags = Flags | FLAG_Z;
432 }
433 else
434 {
435 Flags = Flags & (0xFF - FLAG_Z);
436 }
437}
438
439
440void Group_1(BYTE opcode) {
441 BYTE LB = 0;
442 BYTE HB = 0;
443
444 WORD address = 0;
445 WORD data = 0;
446 WORD param1;
447 WORD param2;
448 WORD temp_word;
449 WORD offset;
450 WORD saved_flags;
451
452
453 BYTE CF;
454 if ((Flags & FLAG_C) == FLAG_C) {
455 CF = 1;
456 }
457 else {
458 CF = 0;
459 }
460
461 BYTE NF;
462 if ((Flags & FLAG_N) == FLAG_N) {
463 NF = 1;
464 }
465 else {
466 NF = 0;
467 }
468
469 BYTE ZF;
470 if ((Flags & FLAG_Z) == FLAG_Z) {
471 ZF = 1;
472 }
473 else {
474 ZF = 0;
475 }
476
477 BYTE VF;
478 if ((Flags & FLAG_V) == FLAG_V) {
479 VF = 1;
480 }
481 else {
482 VF = 0;
483 }
484
485 switch (opcode) {
486 case 0xB7: //LD Immidiate
487 data = fetch();
488 Registers[REGISTER_A] = data;
489 set_flag_n(Registers[REGISTER_A]);
490 set_flag_z(Registers[REGISTER_A]);
491 Flags = Flags & (0xFF - FLAG_C);
492 break;
493
494 case 0xC7:
495 HB = fetch();
496 LB = fetch();
497 address += (WORD)((WORD)HB << 8) + LB;
498 if (address >= 0 && address < MEMORY_SIZE) {
499 Registers[REGISTER_A] = Memory[address];
500 }
501 set_flag_n(Registers[REGISTER_A]);
502 set_flag_z(Registers[REGISTER_A]);
503 Flags = Flags & (0xFF - FLAG_C);
504 break;
505
506 case 0xD7:
507 address += IndexRegister;
508 HB = fetch(); LB = fetch();
509 address += (WORD)((WORD)HB << 8) + LB;
510 if (address >= 0 && address < MEMORY_SIZE) {
511 Registers[REGISTER_A] = Memory[address];
512 }
513 set_flag_n(Registers[REGISTER_A]);
514 set_flag_z(Registers[REGISTER_A]);
515 Flags = Flags & (0xFF - FLAG_C);
516 break;
517
518 ///-------------ST------------///
519
520 case 0x10:
521 HB = fetch();
522 LB = fetch(); address += (WORD)((WORD)HB << 8) + LB;
523 if (address >= 0 && address < MEMORY_SIZE) {
524 Memory[address] = Registers[REGISTER_A];
525 }
526 set_flag_n(Registers[REGISTER_A]);
527 set_flag_z(Registers[REGISTER_A]);
528 Flags = Flags & (0xFF - FLAG_C);
529 break;
530
531 case 0x20:
532 address += IndexRegister;
533 HB = fetch();
534 LB = fetch();
535 address += (WORD)((WORD)HB << 8) + LB
536 ; if (address >= 0 && address < MEMORY_SIZE) {
537 Memory[address] = Registers[REGISTER_A];
538 }
539 set_flag_n(Registers[REGISTER_A]);
540 set_flag_z(Registers[REGISTER_A]);
541 Flags = Flags & (0xFF - FLAG_C);
542 break;
543
544 ////------MVI------///
545
546 case 0x2A:
547 data = fetch();
548 Registers[REGISTER_B] = data;
549 set_flag_n(Registers[REGISTER_A]);
550 set_flag_z(Registers[REGISTER_A]);
551 Flags = Flags & (0xFF - FLAG_C);
552 break;
553
554 case 0x2B:
555 data = fetch();
556 Registers[REGISTER_C] = data;
557 set_flag_n(Registers[REGISTER_A]);
558 set_flag_z(Registers[REGISTER_A]);
559 Flags = Flags & (0xFF - FLAG_C);
560 break;
561
562 case 0x2C:
563 data = fetch();
564 Registers[REGISTER_D] = data;
565 set_flag_n(Registers[REGISTER_A]);
566 set_flag_z(Registers[REGISTER_A]);
567 Flags = Flags & (0xFF - FLAG_C);
568 break;
569
570 case 0x2D:
571 data = fetch();
572 Registers[REGISTER_E] = data;
573 set_flag_n(Registers[REGISTER_A]);
574 set_flag_z(Registers[REGISTER_A]);
575 Flags = Flags & (0xFF - FLAG_C);
576 break;
577
578 case 0x2E:
579 data = fetch();
580 Registers[REGISTER_L] = data;
581 set_flag_n(Registers[REGISTER_A]);
582 set_flag_z(Registers[REGISTER_A]);
583 Flags = Flags & (0xFF - FLAG_C);
584 break;
585
586 case 0x2F:
587 data = fetch();
588 Registers[REGISTER_H] = data;
589 set_flag_n(Registers[REGISTER_A]);
590 set_flag_z(Registers[REGISTER_A]);
591 Flags = Flags & (0xFF - FLAG_C);
592 break;
593 ////----LODS-----///
594 case 0x4F:
595 data = fetch();
596 StackPointer = data << 8;
597 StackPointer += fetch();
598 break;
599
600 case 0x5f:
601 HB = fetch();
602 LB = fetch();
603 address += (WORD)((WORD)HB << 8) + LB;
604 if (address >= 0 && address < MEMORY_SIZE - 1) {
605 StackPointer = (WORD)Memory[address] << 8;
606 StackPointer += Memory[address + 1];
607 }
608 break;
609
610 case 0x6f:
611 address += IndexRegister;
612 HB = fetch();
613 LB = fetch();
614 address += (WORD)((WORD)HB << 8) + LB;
615 if (address >= 0 && address < MEMORY_SIZE - 1) {
616 StackPointer = (WORD)Memory[address] << 8;
617 StackPointer += Memory[address + 1];
618 }
619 break;
620
621 /*
622 * Opcode: LDX
623 * Description: Loads Memory into register X
624 * Flags: - - T - T - - 0
625 * Notes: None
626 */
627 case 0x4E: //LDX IMMEDIATE ADDRESSING (#)
628 data = fetch();
629 Registers[IndexRegister] = data;
630
631 set_flag_n(Registers[IndexRegister]);
632 set_flag_z(Registers[IndexRegister]);
633 Flags = Flags & (0xFF - FLAG_C);
634 break;
635
636 case 0x5E: //LDX ABSOLUTE ADDRESSING (abs)
637 HB = fetch();
638 LB = fetch();
639 address += (WORD)((WORD)HB << 8) + LB;
640 if (address >= 0 && address < MEMORY_SIZE) {
641 Registers[IndexRegister] = Memory[address];
642 }
643
644 set_flag_n(Registers[IndexRegister]);
645 set_flag_z(Registers[IndexRegister]);
646 Flags = Flags & (0xFF - FLAG_C);
647 break;
648
649 case 0x6E: //LDX INDEXED ABSOLUTE ADDRESSING (abs,X)
650 address += IndexRegister;
651 HB = fetch();
652 LB = fetch();
653 address += (WORD)((WORD)HB << 8) + LB;
654 if (address >= 0 && address < MEMORY_SIZE) {
655 Registers[IndexRegister] = Memory[address];
656 }
657
658 set_flag_n(Registers[IndexRegister]);
659 set_flag_z(Registers[IndexRegister]);
660 Flags = Flags & (0xFF - FLAG_C);
661 break;
662
663 /*
664 * Opcode: STOX
665 * Description: Stores register X into Memory
666 * Flags: - - T - T - - 0
667 * Notes: None
668 */
669 case 0x50: //STOX ABSOLUTE ADDRESSING (abs)
670 address += IndexRegister;
671 HB = fetch();
672 LB = fetch();
673 address += (WORD)((WORD)HB << 8) + LB;
674 if (address >= 0 && address < MEMORY_SIZE) {
675 Memory[address] = Registers[IndexRegister];
676 }
677
678 set_flag_n(Registers[IndexRegister]);
679 set_flag_z(Registers[IndexRegister]);
680 Flags = Flags & (0xFF - FLAG_C);
681 break;
682
683 case 0x60: //STOX INDEXED ABSOLUTE ADDRESSING (abs, X)
684 address += IndexRegister;
685 HB = fetch();
686 LB = fetch();
687 address += (WORD)((WORD)HB << 8) + LB;
688 if (address >= 0 && address < MEMORY_SIZE) {
689 Memory[address] = Registers[IndexRegister];
690 }
691
692 set_flag_n(Registers[IndexRegister]);
693 set_flag_z(Registers[IndexRegister]);
694 Flags = Flags & (0xFF - FLAG_C);
695 break;
696
697
698 /////-----ADC-----/////
699
700 case 0x90:
701 param1 = Registers[REGISTER_A];
702 param2 = Registers[REGISTER_B];
703 temp_word = (WORD)param1 + (WORD)param2;
704 if ((Flags & FLAG_C) != 0) {
705 temp_word++;
706 }
707 if (temp_word >= 0x100) {
708 Flags = Flags | FLAG_C; // Set carry flag
709 }
710 else {
711 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
712 }
713 set_flag_n((BYTE)temp_word);
714 set_flag_z((BYTE)temp_word);
715 set_flag_v(param1, param2, (BYTE)temp_word);
716 Registers[REGISTER_A] = (BYTE)temp_word;
717 break;
718
719 case 0xA0:
720 param1 = Registers[REGISTER_A];
721 param2 = Registers[REGISTER_C];
722 temp_word = (WORD)param1 + (WORD)param2;
723 if ((Flags & FLAG_C) != 0) {
724 temp_word++;
725 }
726 if (temp_word >= 0x100) {
727 Flags = Flags | FLAG_C; // Set carry flag
728 }
729 else {
730 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
731 }
732 set_flag_n((BYTE)temp_word);
733 set_flag_z((BYTE)temp_word);
734 set_flag_v(param1, param2, (BYTE)temp_word);
735 Registers[REGISTER_A] = (BYTE)temp_word;
736 break;
737
738 case 0xB0:
739 param1 = Registers[REGISTER_A];
740 param2 = Registers[REGISTER_D];
741 temp_word = (WORD)param1 + (WORD)param2;
742 if ((Flags & FLAG_C) != 0) {
743 temp_word++;
744 }
745 if (temp_word >= 0x100) {
746 Flags = Flags | FLAG_C; // Set carry flag
747 }
748 else {
749 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
750 }
751 set_flag_n((BYTE)temp_word);
752 set_flag_z((BYTE)temp_word);
753 set_flag_v(param1, param2, (BYTE)temp_word);
754 Registers[REGISTER_A] = (BYTE)temp_word;
755 break;
756
757 case 0xC0:
758 param1 = Registers[REGISTER_A];
759 param2 = Registers[REGISTER_E];
760 temp_word = (WORD)param1 + (WORD)param2;
761 if ((Flags & FLAG_C) != 0) {
762 temp_word++;
763 }
764 if (temp_word >= 0x100) {
765 Flags = Flags | FLAG_C; // Set carry flag
766 }
767 else {
768 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
769 }
770 set_flag_n((BYTE)temp_word);
771 set_flag_z((BYTE)temp_word);
772 set_flag_v(param1, param2, (BYTE)temp_word);
773 Registers[REGISTER_A] = (BYTE)temp_word;
774 break;
775
776 case 0xD0:
777 param1 = Registers[REGISTER_A];
778 param2 = Registers[REGISTER_L];
779 temp_word = (WORD)param1 + (WORD)param2;
780 if ((Flags & FLAG_C) != 0) {
781 temp_word++;
782 }
783 if (temp_word >= 0x100) {
784 Flags = Flags | FLAG_C; // Set carry flag
785 }
786 else {
787 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
788 }
789 set_flag_n((BYTE)temp_word);
790 set_flag_z((BYTE)temp_word);
791 set_flag_v(param1, param2, (BYTE)temp_word);
792 Registers[REGISTER_A] = (BYTE)temp_word;
793 break;
794
795 case 0xE0:
796 param1 = Registers[REGISTER_A];
797 param2 = Registers[REGISTER_H];
798 temp_word = (WORD)param1 + (WORD)param2;
799 if ((Flags & FLAG_C) != 0) {
800 temp_word++;
801 }
802 if (temp_word >= 0x100) {
803 Flags = Flags | FLAG_C; // Set carry flag
804 }
805 else {
806 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
807 }
808 set_flag_n((BYTE)temp_word);
809 set_flag_z((BYTE)temp_word);
810 set_flag_v(param1, param2, (BYTE)temp_word);
811 Registers[REGISTER_A] = (BYTE)temp_word;
812 break;
813
814 case 0xF0:
815 param1 = Registers[REGISTER_A];
816 param2 = Registers[REGISTER_M];
817 temp_word = (WORD)param1 + (WORD)param2;
818 if ((Flags & FLAG_C) != 0) {
819 temp_word++;
820 }
821 if (temp_word >= 0x100) {
822 Flags = Flags | FLAG_C; // Set carry flag
823 }
824 else {
825 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
826 }
827 set_flag_n((BYTE)temp_word);
828 set_flag_z((BYTE)temp_word);
829 set_flag_v(param1, param2, (BYTE)temp_word);
830 Registers[REGISTER_A] = (BYTE)temp_word;
831 break;
832
833 /////-------CMP--------/////
834
835 case 0x92:
836 param1 = Registers[REGISTER_A];
837 param2 = Registers[REGISTER_B];
838 temp_word = (WORD)param1 - (WORD)param2;
839 if (temp_word >= 0x100) {
840 Flags = Flags | FLAG_C; // Set carry flag
841 }
842 else {
843 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
844 }
845 set_flag_n((BYTE)temp_word);
846 set_flag_z((BYTE)temp_word);
847 set_flag_v(param1, param2, (BYTE)temp_word);
848 break;
849
850 case 0xA2:
851 param1 = Registers[REGISTER_A];
852 param2 = Registers[REGISTER_C];
853 temp_word = (WORD)param1 - (WORD)param2;
854 if (temp_word >= 0x100) {
855 Flags = Flags | FLAG_C; // Set carry flag
856 }
857 else {
858 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
859 }
860 set_flag_n((BYTE)temp_word);
861 set_flag_z((BYTE)temp_word);
862 set_flag_v(param1, param2, (BYTE)temp_word);
863 break;
864
865 case 0xB2:
866 param1 = Registers[REGISTER_A];
867 param2 = Registers[REGISTER_D];
868 temp_word = (WORD)param1 - (WORD)param2;
869 if (temp_word >= 0x100) {
870 Flags = Flags | FLAG_C; // Set carry flag
871 }
872 else {
873 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
874 }
875 set_flag_n((BYTE)temp_word);
876 set_flag_z((BYTE)temp_word);
877 set_flag_v(param1, param2, (BYTE)temp_word);
878 break;
879
880 case 0xC2:
881 param1 = Registers[REGISTER_A];
882 param2 = Registers[REGISTER_E];
883 temp_word = (WORD)param1 - (WORD)param2;
884 if (temp_word >= 0x100) {
885 Flags = Flags | FLAG_C; // Set carry flag
886 }
887 else {
888 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
889 }
890 set_flag_n((BYTE)temp_word);
891 set_flag_z((BYTE)temp_word);
892 set_flag_v(param1, param2, (BYTE)temp_word);
893 break;
894
895 case 0xD2:
896 param1 = Registers[REGISTER_A];
897 param2 = Registers[REGISTER_L];
898 temp_word = (WORD)param1 - (WORD)param2;
899 if (temp_word >= 0x100) {
900 Flags = Flags | FLAG_C; // Set carry flag
901 }
902 else {
903 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
904 }
905 set_flag_n((BYTE)temp_word);
906 set_flag_z((BYTE)temp_word);
907 set_flag_v(param1, param2, (BYTE)temp_word);
908 break;
909
910 case 0xE2:
911 param1 = Registers[REGISTER_A];
912 param2 = Registers[REGISTER_H];
913 temp_word = (WORD)param1 - (WORD)param2;
914 if (temp_word >= 0x100) {
915 Flags = Flags | FLAG_C; // Set carry flag
916 }
917 else {
918 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
919 }
920 set_flag_n((BYTE)temp_word);
921 set_flag_z((BYTE)temp_word);
922 set_flag_v(param1, param2, (BYTE)temp_word);
923 break;
924
925 case 0xF2:
926 param1 = Registers[REGISTER_A];
927 param2 = Registers[REGISTER_M];
928 temp_word = (WORD)param1 - (WORD)param2;
929 if (temp_word >= 0x100) {
930 Flags = Flags | FLAG_C; // Set carry flag
931 }
932 else {
933 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
934 }
935 set_flag_n((BYTE)temp_word);
936 set_flag_z((BYTE)temp_word);
937 set_flag_v(param1, param2, (BYTE)temp_word);
938 break;
939
940
941 //////-----------TSA-------------//////
942
943 case 0x75:
944 Registers[REGISTER_A] = Flags;
945 break;
946
947
948 //////-----------TAS-------------//////
949
950 case 0x74:
951 Flags = Registers[REGISTER_A];
952 break;
953
954 //////-----------SEC-------------//////
955 case 0x16:
956 Flags = Flags | FLAG_C;
957 break;
958
959 /////-----------CLC----------/////
960
961 case 0x15:
962 Flags = Flags & (0xFF - FLAG_C);
963 break;
964
965 /////----------CLI------------/////
966 case 0x17:
967 Flags = Flags & (0xFF - FLAG_I);
968 break;
969 /////----------STI------------/////
970 case 0x18:
971 Flags = Flags | FLAG_I;
972 break;
973
974 /////----------SEV------------/////
975 Flags = Flags | FLAG_V;
976
977 /////----------CLV------------/////
978 Flags = Flags & (0xFF - FLAG_V);
979
980 /////-----------PSH-----------/////
981 case 0x11:
982 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
983 Memory[StackPointer] = Registers[REGISTER_A];
984 StackPointer--;
985 }
986 break;
987
988 case 0x21:
989 Memory[StackPointer] = Flags;
990 StackPointer--;
991 break;
992
993 case 0x31:
994 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
995 Memory[StackPointer] = Registers[REGISTER_B];
996 StackPointer--;
997 }
998 break;
999
1000 case 0x41:
1001 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1002 Memory[StackPointer] = Registers[REGISTER_C];
1003 StackPointer--;
1004 }
1005 break;
1006
1007 case 0x51:
1008 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1009 Memory[StackPointer] = Registers[REGISTER_D];
1010 StackPointer--;
1011 }
1012 break;
1013
1014 case 0x61:
1015 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1016 Memory[StackPointer] = Registers[REGISTER_E];
1017 StackPointer--;
1018 }
1019 break;
1020
1021 case 0x71:
1022 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1023 Memory[StackPointer] = Registers[REGISTER_L];
1024 StackPointer--;
1025 }
1026 break;
1027
1028 case 0x81:
1029 if ((StackPointer >= 1) && (StackPointer < MEMORY_SIZE)) {
1030 Memory[StackPointer] = Registers[REGISTER_H];
1031 StackPointer--;
1032 }
1033 break;
1034
1035 /////-----------POP------------////
1036
1037 case 0x12:
1038 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1039 StackPointer++;
1040 Registers[REGISTER_A] = Memory[StackPointer];
1041 }
1042 break;
1043
1044 case 0x22:
1045 StackPointer++;
1046 Flags = Memory[StackPointer];
1047 break;
1048
1049 case 0x32:
1050 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1051 StackPointer++;
1052 Registers[REGISTER_B] = Memory[StackPointer];
1053 }
1054 break;
1055
1056 case 0x42:
1057 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1058 StackPointer++;
1059 Registers[REGISTER_C] = Memory[StackPointer];
1060 }
1061 break;
1062
1063 case 0x52:
1064 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1065 StackPointer++;
1066 Registers[REGISTER_D] = Memory[StackPointer];
1067 }
1068 break;
1069
1070 case 0x62:
1071 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1072 StackPointer++;
1073 Registers[REGISTER_E] = Memory[StackPointer];
1074 }
1075 break;
1076
1077 case 0x72:
1078 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1079 StackPointer++;
1080 Registers[REGISTER_L] = Memory[StackPointer];
1081 }
1082 break;
1083
1084 case 0x82:
1085 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 1)) {
1086 StackPointer++;
1087 Registers[REGISTER_H] = Memory[StackPointer];
1088 }
1089 break;
1090
1091 //////------JMP------//////
1092 case 0xFA:
1093 HB = fetch();
1094 LB = fetch();
1095 address = ((WORD)HB << 8) + (WORD)LB;
1096 ProgramCounter = address;
1097 break;
1098
1099 //////-----JPR-----------////
1100 case 0x33:
1101 HB = fetch();
1102 LB = fetch();
1103 address = ((WORD)HB << 8) + (WORD)LB;
1104 ProgramCounter = address;
1105 break;
1106
1107 /////------RTN---------/////
1108 case 0x0E:
1109 HB = fetch();
1110 LB = fetch();
1111 address = ((WORD)HB << 8) + (WORD)LB;
1112 if ((StackPointer >= 0) && (StackPointer < MEMORY_SIZE - 2)) {
1113 StackPointer++;
1114 HB = Memory[StackPointer];
1115 StackPointer++;
1116 LB = Memory[StackPointer];
1117 }
1118 ProgramCounter = ((WORD)HB << 8) + (WORD)LB;
1119 break;
1120
1121 /////------BRA-------/////
1122 case 0x00:
1123 LB = fetch();
1124 offset = (WORD)LB;
1125 if ((offset & 0x80) != 0) {
1126 offset = offset + 0xFF00;
1127 }
1128 address = ProgramCounter + offset;
1129 ProgramCounter = address;
1130 break;
1131
1132 /////------BCC-------/////
1133 case 0x01:
1134 LB = fetch();
1135 if (CF == 0) {
1136 offset = (WORD)LB;
1137 if ((offset & 0x80) != 0) {
1138 offset = offset + 0xFF00;
1139 } address = ProgramCounter + offset;
1140 ProgramCounter = address;
1141 }
1142
1143 break;
1144 /////------BCS-------/////
1145 case 0x02:
1146 LB = fetch();
1147 if (CF == 1){
1148 offset = (WORD)LB;
1149 if ((offset & 0x80) != 0) {
1150 offset = offset + 0xFF00;
1151 } address = ProgramCounter + offset;
1152 ProgramCounter = address;
1153 }
1154 break;
1155 /////------BNE-------/////
1156 case 0x03:
1157 LB = fetch();
1158 if (ZF == 0) {
1159 offset = (WORD)LB;
1160 if ((offset & 0x80) != 0) {
1161 offset = offset + 0xFF00;
1162 } address = ProgramCounter + offset;
1163 ProgramCounter = address;
1164 }
1165 break;
1166
1167 /////------BEQ-------/////
1168 case 0x04:
1169 LB = fetch();
1170 if (ZF == 1) {
1171 offset = (WORD)LB;
1172 if ((offset & 0x80) != 0) {
1173 offset = offset + 0xFF00;
1174 } address = ProgramCounter + offset;
1175 ProgramCounter = address;
1176 }
1177 break;
1178 /////------BVC-------/////
1179 case 0x05:
1180 LB = fetch();
1181 if (VF == 0) {
1182 offset = (WORD)LB;
1183 if ((offset & 0x80) != 0) {
1184 offset = offset + 0xFF00;
1185 } address = ProgramCounter + offset;
1186 ProgramCounter = address;
1187 }
1188 break;
1189 /////------BVS-------/////
1190 case 0x06:
1191 LB = fetch();
1192 if (VF == 1) {
1193 offset = (WORD)LB;
1194 if ((offset & 0x80) != 0) {
1195 offset = offset + 0xFF00;
1196 } address = ProgramCounter + offset;
1197 ProgramCounter = address;
1198 }
1199 break;
1200
1201 /////------BMI-------/////
1202 case 0x07:
1203 LB = fetch();
1204 if (NF == 1) {
1205 offset = (WORD)LB;
1206 if ((offset & 0x80) != 0) {
1207 offset = offset + 0xFF00;
1208 } address = ProgramCounter + offset;
1209 ProgramCounter = address;
1210 }
1211 break;
1212
1213 /////------BPL-------/////
1214 case 0x08:
1215 LB = fetch();
1216 if (NF == 0) {
1217 offset = (WORD)LB;
1218 if ((offset & 0x80) != 0) {
1219 offset = offset + 0xFF00;
1220 } address = ProgramCounter + offset;
1221 ProgramCounter = address;
1222 }
1223 break;
1224 /////------BGE-------/////
1225 case 0x09:
1226 LB = fetch();
1227 if ((NF ^ VF) == 0) {
1228 offset = (WORD)LB;
1229 if ((offset & 0x80) != 0) {
1230 offset = offset + 0xFF00;
1231 } address = ProgramCounter + offset;
1232 ProgramCounter = address;
1233 }
1234 break;
1235 /////------BLE -------/////
1236 case 0x0A:
1237 LB = fetch();
1238 if ((ZF| NF ^ VF) == 0) {
1239 offset = (WORD)LB;
1240 if ((offset & 0x80) != 0) {
1241 offset = offset + 0xFF00;
1242 } address = ProgramCounter + offset;
1243 ProgramCounter = address;
1244 }
1245 break;
1246 /////------BLS------/////
1247 LB = fetch();
1248 if ((CF | ZF) == 1) {
1249 offset = (WORD)LB;
1250 if ((offset & 0x80) != 0) {
1251 offset = offset + 0xFF00;
1252 } address = ProgramCounter + offset;
1253 ProgramCounter = address;
1254 }
1255 /////------BHI------/////
1256 case 0x0C:
1257 LB = fetch();
1258 if ((CF | ZF) == 0) {
1259 offset = (WORD)LB;
1260 if ((offset & 0x80) != 0) {
1261 offset = offset + 0xFF00;
1262 } address = ProgramCounter + offset;
1263 ProgramCounter = address;
1264 }
1265 break;
1266 /////------CCC------/////
1267 case 0x34:
1268 HB = fetch();
1269 LB = fetch();
1270 if (CF == 0)
1271 {
1272 address += (WORD)((WORD)HB << 8) + LB;
1273 if (address >= 0 && address < MEMORY_SIZE)
1274 {
1275
1276 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1277 {
1278 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1279 StackPointer--;
1280 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1281 StackPointer--;
1282 }
1283 ProgramCounter = (WORD)address;
1284 }
1285 }
1286 break;
1287 /////------CCS------/////
1288 case 0x35:
1289 HB = fetch();
1290 LB = fetch();
1291 if (CF == 1)
1292 {
1293 address += (WORD)((WORD)HB << 8) + LB;
1294 if (address >= 0 && address < MEMORY_SIZE)
1295 {
1296
1297 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1298 {
1299 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1300 StackPointer--;
1301 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1302 StackPointer--;
1303 }
1304 ProgramCounter = (WORD)address;
1305 }
1306 }
1307 break;
1308
1309 /////------CNE------/////
1310 case 0x36:
1311 HB = fetch();
1312 LB = fetch();
1313 if (ZF == 0)
1314 {
1315 address += (WORD)((WORD)HB << 8) + LB;
1316 if (address >= 0 && address < MEMORY_SIZE)
1317 {
1318
1319 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1320 {
1321 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1322 StackPointer--;
1323 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1324 StackPointer--;
1325 }
1326 ProgramCounter = (WORD)address;
1327 }
1328 }
1329 break;
1330
1331 /////------CEQ------/////
1332 case 0x37:
1333 HB = fetch();
1334 LB = fetch();
1335 if (ZF == 1)
1336 {
1337 address += (WORD)((WORD)HB << 8) + LB;
1338 if (address >= 0 && address < MEMORY_SIZE)
1339 {
1340
1341 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1342 {
1343 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1344 StackPointer--;
1345 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1346 StackPointer--;
1347 }
1348 ProgramCounter = (WORD)address;
1349 }
1350 }
1351 break;
1352
1353 /////------CVC------/////
1354 case 0x38:
1355 HB = fetch();
1356 LB = fetch();
1357 if (VF == 0)
1358 {
1359 address += (WORD)((WORD)HB << 8) + LB;
1360 if (address >= 0 && address < MEMORY_SIZE)
1361 {
1362
1363 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1364 {
1365 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1366 StackPointer--;
1367 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1368 StackPointer--;
1369 }
1370 ProgramCounter = (WORD)address;
1371 }
1372 }
1373 break;
1374
1375
1376 /////------CVS------/////
1377 case 0x39:
1378 HB = fetch();
1379 LB = fetch();
1380 if (VF == 1)
1381 {
1382 address += (WORD)((WORD)HB << 8) + LB;
1383 if (address >= 0 && address < MEMORY_SIZE)
1384 {
1385
1386 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1387 {
1388 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1389 StackPointer--;
1390 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1391 StackPointer--;
1392 }
1393 ProgramCounter = (WORD)address;
1394 }
1395 }
1396 break;
1397
1398
1399 /////------CMI------/////
1400 case 0x3A:
1401 HB = fetch();
1402 LB = fetch();
1403 if (NF == 1)
1404 {
1405 address += (WORD)((WORD)HB << 8) + LB;
1406 if (address >= 0 && address < MEMORY_SIZE)
1407 {
1408
1409 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1410 {
1411 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1412 StackPointer--;
1413 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1414 StackPointer--;
1415 }
1416 ProgramCounter = (WORD)address;
1417 }
1418 }
1419 break;
1420
1421
1422 /////------CPL------/////
1423 case 0x3B:
1424 HB = fetch();
1425 LB = fetch();
1426 if (NF == 0)
1427 {
1428 address += (WORD)((WORD)HB << 8) + LB;
1429 if (address >= 0 && address < MEMORY_SIZE)
1430 {
1431
1432 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1433 {
1434 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1435 StackPointer--;
1436 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1437 StackPointer--;
1438 }
1439 ProgramCounter = (WORD)address;
1440 }
1441 }
1442 break;
1443
1444
1445 /////------CHI------/////
1446 case 0x3C:
1447 HB = fetch();
1448 LB = fetch();
1449 if ((CF | ZF) == 1)
1450 {
1451 address += (WORD)((WORD)HB << 8) + LB;
1452 if (address >= 0 && address < MEMORY_SIZE)
1453 {
1454
1455 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1456 {
1457 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1458 StackPointer--;
1459 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1460 StackPointer--;
1461 }
1462 ProgramCounter = (WORD)address;
1463 }
1464 }
1465 break;
1466
1467
1468 /////------CLE------/////
1469 case 0x3D:
1470 HB = fetch();
1471 LB = fetch();
1472 if ((CF | ZF) == 0)
1473 {
1474 address += (WORD)((WORD)HB << 8) + LB;
1475 if (address >= 0 && address < MEMORY_SIZE)
1476 {
1477
1478 if ((StackPointer >= 2) && (StackPointer < MEMORY_SIZE))
1479 {
1480 Memory[StackPointer] = (BYTE)(ProgramCounter & 0xFF);
1481 StackPointer--;
1482 Memory[StackPointer] = (BYTE)((ProgramCounter >> 8) & 0xFF);
1483 StackPointer--;
1484 }
1485 ProgramCounter = (WORD)address;
1486 }
1487 }
1488 break;
1489
1490 /////------INC-------/////
1491 case 0x44:
1492 ++Registers[REGISTER_A];
1493 set_flag_n(Registers[REGISTER_A]);
1494 set_flag_z(Registers[REGISTER_A]);
1495 break;
1496
1497 case 0x54:
1498 ++Registers[REGISTER_A];
1499 set_flag_n(Registers[REGISTER_A]);
1500 set_flag_z(Registers[REGISTER_A]);
1501 break;
1502 /////------DEX------/////
1503 case 0x1B:
1504 --IndexRegister;
1505 set_flag_z(IndexRegister);
1506 break;
1507
1508 /////------INCA------/////
1509 case 0x64:
1510 ++Registers[REGISTER_A];
1511 set_flag_n(Registers[REGISTER_A]);
1512 set_flag_z(Registers[REGISTER_A]);
1513
1514
1515 ////-------INX---------////
1516 case 0x1C:
1517 ++IndexRegister;
1518 set_flag_z(IndexRegister);
1519 break;
1520
1521 /////------AND------/////
1522 case 0x94:
1523 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_B];
1524 set_flag_n(Registers[REGISTER_A]);
1525 set_flag_z(Registers[REGISTER_A]);
1526 break;
1527
1528 case 0xA4:
1529 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_C];
1530 set_flag_n(Registers[REGISTER_A]);
1531 set_flag_z(Registers[REGISTER_A]);
1532 break;
1533
1534 case 0xB4:
1535 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_D];
1536 set_flag_n(Registers[REGISTER_A]);
1537 set_flag_z(Registers[REGISTER_A]);
1538 break;
1539
1540 case 0xC4:
1541 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_E];
1542 set_flag_n(Registers[REGISTER_A]);
1543 set_flag_z(Registers[REGISTER_A]);
1544 break;
1545
1546 case 0xD4:
1547 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_L];
1548 set_flag_n(Registers[REGISTER_A]);
1549 set_flag_z(Registers[REGISTER_A]);
1550 break;
1551
1552 case 0xE4:
1553 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_H];
1554 set_flag_n(Registers[REGISTER_A]);
1555 set_flag_z(Registers[REGISTER_A]);
1556 break;
1557
1558 case 0xF4:
1559 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_M];
1560 set_flag_n(Registers[REGISTER_A]);
1561 set_flag_z(Registers[REGISTER_A]);
1562 break;
1563 /////-----BT----/////
1564 case 0x96:
1565 data = Registers[REGISTER_A] & Registers[REGISTER_B];
1566 set_flag_n(data);
1567 set_flag_z(data);
1568 break;
1569
1570 case 0xA6:
1571 data = Registers[REGISTER_A] & Registers[REGISTER_C];
1572 set_flag_n(data);
1573 set_flag_z(data);
1574 break;
1575
1576 case 0xB6:
1577 data = Registers[REGISTER_A] & Registers[REGISTER_D];
1578 set_flag_n(data);
1579 set_flag_z(data);
1580 break;
1581
1582 case 0xC6:
1583 data = Registers[REGISTER_A] & Registers[REGISTER_E];
1584 set_flag_n(data);
1585 set_flag_z(data);
1586 break;
1587
1588 case 0xD6:
1589 data = Registers[REGISTER_A] & Registers[REGISTER_L];
1590 set_flag_n(data);
1591 set_flag_z(data);
1592 break;
1593
1594 case 0xE6:
1595 data = Registers[REGISTER_A] & Registers[REGISTER_H];
1596 set_flag_n(data);
1597 set_flag_z(data);
1598 break;
1599
1600 case 0xF6:
1601 data = Registers[REGISTER_A] & Registers[REGISTER_M];
1602 set_flag_n(data);
1603 set_flag_z(data);
1604 break;
1605 /////--------SBC-------/////
1606 case 0x91:
1607 param1 = Registers[REGISTER_A];
1608 param2 = Registers[REGISTER_B];
1609 temp_word = (WORD)param1 - (WORD)param2;
1610 if ((Flags & FLAG_C) != 0) {
1611 temp_word--;
1612 }
1613 if (temp_word >= 0x100) {
1614 Flags = Flags | FLAG_C; // Set carry flag
1615 }
1616 else {
1617 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
1618 }
1619 set_flag_n((BYTE)temp_word);
1620 set_flag_z((BYTE)temp_word);
1621 set_flag_v(param1, -param2, (BYTE)temp_word);
1622 Registers[REGISTER_A] = (BYTE)temp_word;
1623
1624 break;
1625 case 0xA1:
1626 param1 = Registers[REGISTER_A];
1627 param2 = Registers[REGISTER_C];
1628 temp_word = (WORD)param1 - (WORD)param2;
1629 if ((Flags & FLAG_C) != 0) {
1630 temp_word++;
1631 }
1632 if (temp_word >= 0x100) {
1633 Flags = Flags | FLAG_C; // Set carry flag
1634 }
1635 else {
1636 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
1637 }
1638 set_flag_n((BYTE)temp_word);
1639 set_flag_z((BYTE)temp_word);
1640 set_flag_v(param1, - param2, (BYTE)temp_word);
1641 Registers[REGISTER_A] = (BYTE)temp_word;
1642 break;
1643 case 0xB1:
1644 param1 = Registers[REGISTER_A];
1645 param2 = Registers[REGISTER_D];
1646 temp_word = (WORD)param1 - (WORD)param2;
1647 if ((Flags & FLAG_C) != 0) {
1648 temp_word++;
1649 }
1650 if (temp_word >= 0x100) {
1651 Flags = Flags | FLAG_C; // Set carry flag
1652 }
1653 else {
1654 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
1655 }
1656 set_flag_n((BYTE)temp_word);
1657 set_flag_z((BYTE)temp_word);
1658 set_flag_v(param1, -param2, (BYTE)temp_word);
1659 Registers[REGISTER_A] = (BYTE)temp_word;
1660 break;
1661 case 0xC1:
1662 param1 = Registers[REGISTER_A];
1663 param2 = Registers[REGISTER_E];
1664 temp_word = (WORD)param1 - (WORD)param2;
1665 if ((Flags & FLAG_C) != 0) {
1666 temp_word++;
1667 }
1668 if (temp_word >= 0x100) {
1669 Flags = Flags | FLAG_C; // Set carry flag
1670 }
1671 else {
1672 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
1673 }
1674 set_flag_n((BYTE)temp_word);
1675 set_flag_z((BYTE)temp_word);
1676 set_flag_v(param1, -param2, (BYTE)temp_word);
1677 Registers[REGISTER_A] = (BYTE)temp_word;
1678 break;
1679 case 0xD1:
1680 param1 = Registers[REGISTER_A];
1681 param2 = Registers[REGISTER_L];
1682 temp_word = (WORD)param1 - (WORD)param2;
1683 if ((Flags & FLAG_C) != 0) {
1684 temp_word++;
1685 }
1686 if (temp_word >= 0x100) {
1687 Flags = Flags | FLAG_C; // Set carry flag
1688 }
1689 else {
1690 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
1691 }
1692 set_flag_n((BYTE)temp_word);
1693 set_flag_z((BYTE)temp_word);
1694 set_flag_v(param1, -param2, (BYTE)temp_word);
1695 Registers[REGISTER_A] = (BYTE)temp_word;
1696 break;
1697 case 0xE1:
1698 param1 = Registers[REGISTER_A];
1699 param2 = Registers[REGISTER_H];
1700 temp_word = (WORD)param1 - (WORD)param2;
1701 if ((Flags & FLAG_C) != 0) {
1702 temp_word++;
1703 }
1704 if (temp_word >= 0x100) {
1705 Flags = Flags | FLAG_C; // Set carry flag
1706 }
1707 else {
1708 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
1709 }
1710 set_flag_n((BYTE)temp_word);
1711 set_flag_z((BYTE)temp_word);
1712 set_flag_v(param1, param2, (BYTE)temp_word);
1713 Registers[REGISTER_A] = (BYTE)temp_word;
1714 break;
1715 case 0xF1:
1716 param1 = Registers[REGISTER_A];
1717 param2 = Registers[REGISTER_M];
1718 temp_word = (WORD)param1 - (WORD)param2;
1719 if ((Flags & FLAG_C) != 0) {
1720 temp_word++;
1721 }
1722 if (temp_word >= 0x100) {
1723 Flags = Flags | FLAG_C; // Set carry flag
1724 }
1725 else {
1726 Flags = Flags & (0xFF - FLAG_C); // Clear carry flag
1727 }
1728 set_flag_n((BYTE)temp_word);
1729 set_flag_z((BYTE)temp_word);
1730 set_flag_v(param1, -param2, (BYTE)temp_word);
1731 Registers[REGISTER_A] = (BYTE)temp_word;
1732 break;
1733 /////------IOR------/////
1734 case 0x93:
1735 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_B];
1736 set_flag_n(Registers[REGISTER_A]);
1737 set_flag_z(Registers[REGISTER_A]);
1738 break;
1739
1740 case 0xA3:
1741 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_C];
1742 set_flag_n(Registers[REGISTER_A]);
1743 set_flag_z(Registers[REGISTER_A]);
1744 break;
1745
1746 case 0xB3:
1747 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_D];
1748 set_flag_n(Registers[REGISTER_A]);
1749 set_flag_z(Registers[REGISTER_A]);
1750 break;
1751
1752 case 0xC3:
1753 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_E];
1754 set_flag_n(Registers[REGISTER_A]);
1755 set_flag_z(Registers[REGISTER_A]);
1756 break;
1757
1758 case 0xD3:
1759 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_L];
1760 set_flag_n(Registers[REGISTER_A]);
1761 set_flag_z(Registers[REGISTER_A]);
1762 break;
1763
1764 case 0xE3:
1765 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_H];
1766 set_flag_n(Registers[REGISTER_A]);
1767 set_flag_z(Registers[REGISTER_A]);
1768 break;
1769
1770 case 0xF3:
1771 Registers[REGISTER_A] = Registers[REGISTER_A] & Registers[REGISTER_M];
1772 set_flag_n(Registers[REGISTER_A]);
1773 set_flag_z(Registers[REGISTER_A]);
1774 break;
1775
1776 /////-----NOTA-----/////
1777 case 0x6A:
1778 temp_word = ~Registers[REGISTER_A];
1779
1780 if (temp_word >= 0x100) {
1781 Flags = Flags | FLAG_C; //Set carry flag
1782 }
1783 else {
1784 Flags = Flags & (0xFF - FLAG_C); //Clear carry flag
1785 }
1786
1787 Memory[address] = (BYTE)temp_word;
1788 set_flag_z(temp_word);
1789 set_flag_n(temp_word);
1790 break;
1791 break;
1792
1793
1794 /////-----XOR----/////
1795 case 0x95:
1796 Registers[REGISTER_A] = Registers[REGISTER_A] ^ Registers[REGISTER_B];
1797 set_flag_n(Registers[REGISTER_A]);
1798 set_flag_z(Registers[REGISTER_A]);
1799 break;
1800 case 0xA5:
1801 Registers[REGISTER_A] = Registers[REGISTER_A] ^ Registers[REGISTER_C];
1802 set_flag_n(Registers[REGISTER_A]);
1803 set_flag_z(Registers[REGISTER_A]);
1804 break;
1805 case 0xB5:
1806 Registers[REGISTER_A] = Registers[REGISTER_A] ^ Registers[REGISTER_D];
1807 set_flag_n(Registers[REGISTER_A]);
1808 set_flag_z(Registers[REGISTER_A]);
1809 break;
1810 case 0xC5:
1811 Registers[REGISTER_A] = Registers[REGISTER_A] ^ Registers[REGISTER_E];
1812 set_flag_n(Registers[REGISTER_A]);
1813 set_flag_z(Registers[REGISTER_A]);
1814 break;
1815 case 0xD5:
1816 Registers[REGISTER_A] = Registers[REGISTER_A] ^ Registers[REGISTER_L];
1817 set_flag_n(Registers[REGISTER_A]);
1818 set_flag_z(Registers[REGISTER_A]);
1819 break;
1820 case 0xE5:
1821 Registers[REGISTER_A] = Registers[REGISTER_A] ^ Registers[REGISTER_H];
1822 set_flag_n(Registers[REGISTER_A]);
1823 set_flag_z(Registers[REGISTER_A]);
1824 break;
1825 case 0xF5:
1826 Registers[REGISTER_A] = Registers[REGISTER_A] ^ Registers[REGISTER_M];
1827 set_flag_n(Registers[REGISTER_A]);
1828 set_flag_z(Registers[REGISTER_A]);
1829 break;
1830
1831 /////-----TST-----/////
1832 case 0x43:
1833
1834 break;
1835
1836 case 0x53:
1837
1838 break;
1839 /////-----DEC-----/////
1840 case 0x45:
1841
1842 break;
1843 case 0x55:
1844
1845 break;
1846 /////-----SAL-----/////
1847 case 0x48:
1848
1849 break;
1850
1851 case 0x58:
1852
1853 break;
1854 /////-----ASR-----/////
1855 case 0x49:
1856
1857 break;
1858 case 0x59:
1859
1860 break;
1861 /////-----SWI-----/////
1862 case 0x85:
1863
1864 break;
1865
1866 /////-----RTI-----/////
1867 case 0x86:
1868
1869 break;
1870 }
1871
1872 /////-----RCLA-----/////
1873 case 0x67:
1874 saved_flags = Flags;
1875 if ((Registers[REGISTER_A] & 0x80) == 0x80) {
1876 Flags = Flags | FLAG_C;
1877 }
1878 else {
1879 Flags = Flags & (0xFF - FLAG_C);
1880 }
1881 Registers[REGISTER_A] = (Registers[REGISTER_A]<<1) & 0xFE;
1882 if ((saved_flags & FLAG_C) == FLAG_C) {
1883 Registers[REGISTER_A] = Registers[REGISTER_A] | 0x01;
1884 }
1885 break;
1886 }
1887
1888}
1889
1890
1891void Group_2_Move(BYTE opcode) {
1892 WORD address = 0;
1893
1894 BYTE source = opcode >> 4;
1895 BYTE dest = opcode & 0x0F;
1896 int destReg = 0;
1897 int sourceReg = 0;
1898 /////----MOVE DEST----/////
1899 switch (dest) {
1900 case 0x08:
1901 destReg = REGISTER_A;
1902 break;
1903
1904 case 0x09:
1905 destReg = REGISTER_B;
1906 break;
1907
1908 case 0x0A:
1909 destReg = REGISTER_C;
1910 break;
1911
1912 case 0x0B:
1913 destReg = REGISTER_D;
1914 break;
1915
1916 case 0x0C:
1917 destReg = REGISTER_E;
1918 break;
1919
1920 case 0x0D:
1921 destReg = REGISTER_L;
1922 break;
1923
1924 case 0x0E:
1925 destReg = REGISTER_H;
1926 break;
1927
1928 case 0x0F:
1929 destReg = REGISTER_M;
1930 break;
1931 }
1932
1933 /////------MOVE SOURCE------/////
1934 switch (source) {
1935 case 0x07:
1936 sourceReg = REGISTER_A;
1937 break;
1938
1939 case 0x08:
1940 sourceReg = REGISTER_B;
1941 break;
1942
1943 case 0x09:
1944 sourceReg = REGISTER_C;
1945 break;
1946
1947 case 0x0A:
1948 sourceReg = REGISTER_D;
1949 break;
1950
1951 case 0x0B:
1952 sourceReg = REGISTER_E;
1953 break;
1954
1955 case 0x0C:
1956 sourceReg = REGISTER_L;
1957 break;
1958
1959 case 0x0D:
1960 sourceReg = REGISTER_H;
1961 break;
1962
1963 case 0x0E:
1964 sourceReg = REGISTER_M;
1965 break;
1966 }
1967
1968 if (sourceReg == REGISTER_M) {
1969 address = Registers[REGISTER_L];
1970 address += (WORD)Registers[REGISTER_H] << 8;
1971 Registers[destReg] = Memory[address];
1972 }
1973 Registers[destReg] = Registers[sourceReg];
1974
1975 if (destReg == REGISTER_M) {
1976 address = Registers[REGISTER_L];
1977 address += (WORD)Registers[REGISTER_H] << 8;
1978 Memory[address] = Registers[REGISTER_M];
1979 }
1980}
1981
1982
1983
1984void execute(BYTE opcode)
1985{
1986 if (((opcode >= 0x78) && (opcode <= 0x7F))
1987 || ((opcode >= 0x88) && (opcode <= 0x8F))
1988 || ((opcode >= 0x98) && (opcode <= 0x9F))
1989 || ((opcode >= 0xA8) && (opcode <= 0xAF))
1990 || ((opcode >= 0xB8) && (opcode <= 0xBF))
1991 || ((opcode >= 0xC8) && (opcode <= 0xCF))
1992 || ((opcode >= 0xD8) && (opcode <= 0xDF))
1993 || ((opcode >= 0xE8) && (opcode <= 0xEF)))
1994 {
1995 Group_2_Move(opcode);
1996 }
1997 else
1998 {
1999 Group_1(opcode);
2000 }
2001}
2002
2003void emulate()
2004{
2005 BYTE opcode;
2006 int sanity;
2007 ProgramCounter = 0;
2008 halt = false;
2009 memory_in_range = true;
2010 sanity = 0;
2011
2012 printf(" A B C D E L H X SP\n");
2013 while ((!halt) && (memory_in_range)) {
2014 sanity++;
2015 if (sanity > 500) halt = true;
2016 printf("%04X ", ProgramCounter); // Print current address
2017 opcode = fetch();
2018 execute(opcode);
2019
2020 printf("%s ", opcode_mneumonics[opcode]); // Print current opcode
2021
2022 printf("%02X ", Registers[REGISTER_A]);
2023 printf("%02X ", Registers[REGISTER_B]);
2024 printf("%02X ", Registers[REGISTER_C]);
2025 printf("%02X ", Registers[REGISTER_D]);
2026 printf("%02X ", Registers[REGISTER_E]);
2027 printf("%02X ", Registers[REGISTER_L]);
2028 printf("%02X ", Registers[REGISTER_H]);
2029 printf("%04X ", IndexRegister);
2030 printf("%04X ", StackPointer); // Print Stack Pointer
2031
2032 if ((Flags & FLAG_I) == FLAG_I)
2033 {
2034 printf("I=1 ");
2035 }
2036 else
2037 {
2038 printf("I=0 ");
2039 }
2040 if ((Flags & FLAG_N) == FLAG_N)
2041 {
2042 printf("N=1 ");
2043 }
2044 else
2045 {
2046 printf("N=0 ");
2047 }
2048 if ((Flags & FLAG_V) == FLAG_V)
2049 {
2050 printf("V=1 ");
2051 }
2052 else
2053 {
2054 printf("V=0 ");
2055 }
2056 if ((Flags & FLAG_Z) == FLAG_Z)
2057 {
2058 printf("Z=1 ");
2059 }
2060 else
2061 {
2062 printf("Z=0 ");
2063 }
2064 if ((Flags & FLAG_C) == FLAG_C)
2065 {
2066 printf("C=1 ");
2067 }
2068 else
2069 {
2070 printf("C=0 ");
2071 }
2072
2073 printf("\n"); // New line
2074 }
2075
2076 printf("\n"); // New line
2077}
2078
2079
2080////////////////////////////////////////////////////////////////////////////////
2081// Simulator/Emulator (End) //
2082////////////////////////////////////////////////////////////////////////////////
2083
2084
2085void initialise_filenames() {
2086 int i;
2087
2088 for (i = 0; i < MAX_FILENAME_SIZE; i++) {
2089 hex_file[i] = '\0';
2090 trc_file[i] = '\0';
2091 }
2092}
2093
2094
2095
2096
2097int find_dot_position(char* filename) {
2098 int dot_position;
2099 int i;
2100 char chr;
2101
2102 dot_position = 0;
2103 i = 0;
2104 chr = filename[i];
2105
2106 while (chr != '\0') {
2107 if (chr == '.') {
2108 dot_position = i;
2109 }
2110 i++;
2111 chr = filename[i];
2112 }
2113
2114 return (dot_position);
2115}
2116
2117
2118int find_end_position(char* filename) {
2119 int end_position;
2120 int i;
2121 char chr;
2122
2123 end_position = 0;
2124 i = 0;
2125 chr = filename[i];
2126
2127 while (chr != '\0') {
2128 end_position = i;
2129 i++;
2130 chr = filename[i];
2131 }
2132
2133 return (end_position);
2134}
2135
2136
2137bool file_exists(char* filename) {
2138 bool exists;
2139 FILE* ifp;
2140
2141 exists = false;
2142
2143 if ((ifp = fopen(filename, "r")) != NULL) {
2144 exists = true;
2145
2146 fclose(ifp);
2147 }
2148
2149 return (exists);
2150}
2151
2152
2153
2154void create_file(char* filename) {
2155 FILE* ofp;
2156
2157 if ((ofp = fopen(filename, "w")) != NULL) {
2158 fclose(ofp);
2159 }
2160}
2161
2162
2163
2164bool getline(FILE* fp, char* buffer) {
2165 bool rc;
2166 bool collect;
2167 char c;
2168 int i;
2169
2170 rc = false;
2171 collect = true;
2172
2173 i = 0;
2174 while (collect) {
2175 c = getc(fp);
2176
2177 switch (c) {
2178 case EOF:
2179 if (i > 0) {
2180 rc = true;
2181 }
2182 collect = false;
2183 break;
2184
2185 case '\n':
2186 if (i > 0) {
2187 rc = true;
2188 collect = false;
2189 buffer[i] = '\0';
2190 }
2191 break;
2192
2193 default:
2194 buffer[i] = c;
2195 i++;
2196 break;
2197 }
2198 }
2199
2200 return (rc);
2201}
2202
2203
2204
2205
2206
2207
2208void load_and_run(int args, _TCHAR** argv) {
2209 char chr;
2210 int ln;
2211 int dot_position;
2212 int end_position;
2213 long i;
2214 FILE* ifp;
2215 long address;
2216 long load_at;
2217 int code;
2218
2219 // Prompt for the .hex file
2220
2221 printf("\n");
2222 printf("Enter the hex filename (.hex): ");
2223
2224 if (args == 2) {
2225 ln = 0;
2226 chr = argv[1][ln];
2227 while (chr != '\0')
2228 {
2229 if (ln < MAX_FILENAME_SIZE)
2230 {
2231 hex_file[ln] = chr;
2232 trc_file[ln] = chr;
2233 ln++;
2234 }
2235 chr = argv[1][ln];
2236 }
2237 }
2238 else {
2239 ln = 0;
2240 chr = '\0';
2241 while (chr != '\n') {
2242 chr = getchar();
2243
2244 switch (chr) {
2245 case '\n':
2246 break;
2247 default:
2248 if (ln < MAX_FILENAME_SIZE) {
2249 hex_file[ln] = chr;
2250 trc_file[ln] = chr;
2251 ln++;
2252 }
2253 break;
2254 }
2255 }
2256
2257 }
2258 // Tidy up the file names
2259
2260 dot_position = find_dot_position(hex_file);
2261 if (dot_position == 0) {
2262 end_position = find_end_position(hex_file);
2263
2264 hex_file[end_position + 1] = '.';
2265 hex_file[end_position + 2] = 'h';
2266 hex_file[end_position + 3] = 'e';
2267 hex_file[end_position + 4] = 'x';
2268 hex_file[end_position + 5] = '\0';
2269 }
2270 else {
2271 hex_file[dot_position + 0] = '.';
2272 hex_file[dot_position + 1] = 'h';
2273 hex_file[dot_position + 2] = 'e';
2274 hex_file[dot_position + 3] = 'x';
2275 hex_file[dot_position + 4] = '\0';
2276 }
2277
2278 dot_position = find_dot_position(trc_file);
2279 if (dot_position == 0) {
2280 end_position = find_end_position(trc_file);
2281
2282 trc_file[end_position + 1] = '.';
2283 trc_file[end_position + 2] = 't';
2284 trc_file[end_position + 3] = 'r';
2285 trc_file[end_position + 4] = 'c';
2286 trc_file[end_position + 5] = '\0';
2287 }
2288 else {
2289 trc_file[dot_position + 0] = '.';
2290 trc_file[dot_position + 1] = 't';
2291 trc_file[dot_position + 2] = 'r';
2292 trc_file[dot_position + 3] = 'c';
2293 trc_file[dot_position + 4] = '\0';
2294 }
2295
2296 if (file_exists(hex_file)) {
2297 // Clear Registers and Memory
2298
2299 Registers[REGISTER_A] = 0;
2300 Registers[REGISTER_B] = 0;
2301 Registers[REGISTER_C] = 0;
2302 Registers[REGISTER_D] = 0;
2303 Registers[REGISTER_E] = 0;
2304 Registers[REGISTER_L] = 0;
2305 Registers[REGISTER_H] = 0;
2306 IndexRegister = 0;
2307 Flags = 0;
2308 ProgramCounter = 0;
2309 StackPointer = 0;
2310
2311 for (i = 0; i < MEMORY_SIZE; i++) {
2312 Memory[i] = 0x00;
2313 }
2314
2315 // Load hex file
2316
2317 if ((ifp = fopen(hex_file, "r")) != NULL) {
2318 printf("Loading file...\n\n");
2319
2320 load_at = 0;
2321
2322 while (getline(ifp, InputBuffer)) {
2323 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
2324 load_at = address;
2325 }
2326 else if (sscanf(InputBuffer, "%x", &code) == 1) {
2327 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
2328 Memory[load_at] = (BYTE)code;
2329 }
2330 load_at++;
2331 }
2332 else {
2333 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
2334 }
2335 }
2336
2337 fclose(ifp);
2338 }
2339
2340 // Emulate
2341
2342 emulate();
2343 }
2344 else {
2345 printf("\n");
2346 printf("ERROR> Input file %s does not exist!\n", hex_file);
2347 printf("\n");
2348 }
2349}
2350
2351void building(int args, _TCHAR** argv) {
2352 char buffer[1024];
2353 load_and_run(args, argv);
2354 sprintf(buffer, "0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X,0x%02X",
2355 Memory[TEST_ADDRESS_1],
2356 Memory[TEST_ADDRESS_2],
2357 Memory[TEST_ADDRESS_3],
2358 Memory[TEST_ADDRESS_4],
2359 Memory[TEST_ADDRESS_5],
2360 Memory[TEST_ADDRESS_6],
2361 Memory[TEST_ADDRESS_7],
2362 Memory[TEST_ADDRESS_8],
2363 Memory[TEST_ADDRESS_9],
2364 Memory[TEST_ADDRESS_10],
2365 Memory[TEST_ADDRESS_11],
2366 Memory[TEST_ADDRESS_12]
2367 );
2368 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR*)&server_addr, sizeof(SOCKADDR));
2369}
2370
2371
2372
2373void test_and_mark() {
2374 char buffer[1024];
2375 bool testing_complete;
2376 int len = sizeof(SOCKADDR);
2377 char chr;
2378 int i;
2379 int j;
2380 bool end_of_program;
2381 long address;
2382 long load_at;
2383 int code;
2384 int mark;
2385 int passed;
2386
2387 printf("\n");
2388 printf("Automatic Testing and Marking\n");
2389 printf("\n");
2390
2391 testing_complete = false;
2392
2393 sprintf(buffer, "Test Student %s", STUDENT_NUMBER);
2394 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR*)&server_addr, sizeof(SOCKADDR));
2395
2396 while (!testing_complete) {
2397 memset(buffer, '\0', sizeof(buffer));
2398
2399 if (recvfrom(sock, buffer, sizeof(buffer) - 1, 0, (SOCKADDR*)&client_addr, &len) != SOCKET_ERROR) {
2400 printf("Incoming Data: %s \n", buffer);
2401
2402 //if (strcmp(buffer, "Testing complete") == 1)
2403 if (sscanf(buffer, "Testing complete %d", &mark) == 1) {
2404 testing_complete = true;
2405 printf("Current mark = %d\n", mark);
2406
2407 }
2408 else if (sscanf(buffer, "Tests passed %d", &passed) == 1) {
2409 //testing_complete = true;
2410 printf("Passed = %d\n", passed);
2411
2412 }
2413 else if (strcmp(buffer, "Error") == 0) {
2414 printf("ERROR> Testing abnormally terminated\n");
2415 testing_complete = true;
2416 }
2417 else {
2418 // Clear Registers and Memory
2419
2420 Registers[REGISTER_A] = 0;
2421 Registers[REGISTER_B] = 0;
2422 Registers[REGISTER_C] = 0;
2423 Registers[REGISTER_D] = 0;
2424 Registers[REGISTER_E] = 0;
2425 Registers[REGISTER_L] = 0;
2426 Registers[REGISTER_H] = 0;
2427 IndexRegister = 0;
2428 Flags = 0;
2429 ProgramCounter = 0;
2430 StackPointer = 0;
2431 for (i = 0; i < MEMORY_SIZE; i++) {
2432 Memory[i] = 0;
2433 }
2434
2435 // Load hex file
2436
2437 i = 0;
2438 j = 0;
2439 load_at = 0;
2440 end_of_program = false;
2441 FILE* ofp;
2442 fopen_s(&ofp, "branch.txt", "a");
2443
2444 while (!end_of_program) {
2445 chr = buffer[i];
2446 switch (chr) {
2447 case '\0':
2448 end_of_program = true;
2449
2450 case ',':
2451 if (sscanf(InputBuffer, "L=%x", &address) == 1) {
2452 load_at = address;
2453 }
2454 else if (sscanf(InputBuffer, "%x", &code) == 1) {
2455 if ((load_at >= 0) && (load_at <= MEMORY_SIZE)) {
2456 Memory[load_at] = (BYTE)code;
2457 fprintf(ofp, "%02X\n", (BYTE)code);
2458 }
2459 load_at++;
2460 }
2461 else {
2462 printf("ERROR> Failed to load instruction: %s \n", InputBuffer);
2463 }
2464 j = 0;
2465 break;
2466
2467 default:
2468 InputBuffer[j] = chr;
2469 j++;
2470 break;
2471 }
2472 i++;
2473 }
2474 fclose(ofp);
2475 // Emulate
2476
2477 if (load_at > 1) {
2478 emulate();
2479 // Send and store results
2480 sprintf(buffer, "%02X%02X %02X%02X %02X%02X %02X%02X %02X%02X %02X%02X",
2481 Memory[TEST_ADDRESS_1],
2482 Memory[TEST_ADDRESS_2],
2483 Memory[TEST_ADDRESS_3],
2484 Memory[TEST_ADDRESS_4],
2485 Memory[TEST_ADDRESS_5],
2486 Memory[TEST_ADDRESS_6],
2487 Memory[TEST_ADDRESS_7],
2488 Memory[TEST_ADDRESS_8],
2489 Memory[TEST_ADDRESS_9],
2490 Memory[TEST_ADDRESS_10],
2491 Memory[TEST_ADDRESS_11],
2492 Memory[TEST_ADDRESS_12]
2493 );
2494 sendto(sock, buffer, strlen(buffer), 0, (SOCKADDR*)&server_addr, sizeof(SOCKADDR));
2495 }
2496 }
2497 }
2498 }
2499}
2500
2501
2502
2503int _tmain(int argc, _TCHAR* argv[])
2504{
2505 char chr;
2506 char dummy;
2507
2508 printf("\n");
2509 printf("Microprocessor Emulator\n");
2510 printf("UWE Computer and Network Systems Assignment 1\n");
2511 printf("\n");
2512
2513 initialise_filenames();
2514
2515 if (WSAStartup(MAKEWORD(2, 2), &data) != 0) return(0);
2516
2517 sock = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); // Here we create our socket, which will be a UDP socket (SOCK_DGRAM).
2518 if (!sock) {
2519 // Creation failed!
2520 }
2521
2522 memset(&server_addr, 0, sizeof(SOCKADDR_IN));
2523 server_addr.sin_family = AF_INET;
2524 server_addr.sin_addr.s_addr = inet_addr(IP_ADDRESS_SERVER);
2525 server_addr.sin_port = htons(PORT_SERVER);
2526
2527 memset(&client_addr, 0, sizeof(SOCKADDR_IN));
2528 client_addr.sin_family = AF_INET;
2529 client_addr.sin_addr.s_addr = inet_addr("127.0.0.1");
2530 client_addr.sin_port = htons(PORT_CLIENT);
2531
2532 chr = '\0';
2533 while ((chr != 'e') && (chr != 'E'))
2534 {
2535 printf("\n");
2536 printf("Please select option\n");
2537 printf("L - Load and run a hex file\n");
2538 printf("T - Have the server test and mark your emulator\n");
2539 printf("E - Exit\n");
2540 if (argc == 2) { building(argc, argv); exit(0); }
2541 printf("Enter option: ");
2542 chr = getchar();
2543 if (chr != 0x0A)
2544 {
2545 dummy = getchar(); // read in the <CR>
2546 }
2547 printf("\n");
2548
2549 switch (chr)
2550 {
2551 case 'L':
2552 case 'l':
2553 load_and_run(argc, argv);
2554 break;
2555
2556 case 'T':
2557 case 't':
2558 test_and_mark();
2559 break;
2560
2561 default:
2562 break;
2563 }
2564 }
2565
2566 closesocket(sock);
2567 WSACleanup();
2568
2569
2570 return 0;
2571}